[coreboot-gerrit] Change in coreboot[master]: soc: Add dram information to cbmem

[mturney mturney (Code Review)]

Attention is currently required from: Ravi kumar, Shelley Chen, mturney mturney, Julius Werner.
mturney mturney has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59195 )

Change subject: soc: Add dram information to cbmem
......................................................................

Patch Set 6:

(1 comment)

File src/soc/qualcomm/common/qclib.c:

https://review.coreboot.org/c/coreboot/+/59195/comment/340b9cef_751639d0 
PS5, Line 174: mem_chip_info
> Julius, […]

Since CB isn't passing data into QcLib, would it be better to pass NULL (address) and 0 (size) as the parameters to qclib_add_if_table_entry()?  Would this be less confusing?