Attention is currently required from: Anil Kumar K, Bora Guvendik, Jamie Ryu, Jérémy Compostella, Kapil Porwal, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Subrata Banik, Wonkyu Kim.
Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83789?usp=email )
Change subject: soc/intel/ptl: Add GPIOs for Panther Lake SOC
......................................................................
Patch Set 28:
(5 comments)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83789/comment/ee847d54_cf351574?usp... :
PS24, Line 261: config SOC_INTEL_ACPI_GPIO_PINCTRL_COMPACT
when true, only GPP_[group]_[n] pads will be included in pincrtl. […]
Sure. I will remove this flag. Let me contact the pinctrl owner. It does not make sense to me to include those non GPP PADs.
File src/soc/intel/pantherlake/gpio.c:
https://review.coreboot.org/c/coreboot/+/83789/comment/70e34ca7_05aab118?usp... :
PS17, Line 38: GPP_ASPIO
The GPIO group names come from Intel's GPIO HAS document. GPP_ASPI0 contains GPP_A and SPI0 pads. […]
agree. thx for the explanation! I will make the change.
https://review.coreboot.org/c/coreboot/+/83789/comment/3771fb3d_0e815aa6?usp... :
PS17, Line 177: { PMC_GPP_E, GPP_E },
will modify the this order accordingly. […]
sure. will make the changes.
File src/soc/intel/pantherlake/include/soc/gpio_defs.h:
https://review.coreboot.org/c/coreboot/+/83789/comment/88b64ea1_bf2ae8df?usp... :
PS28, Line 275:
drop one empty line
Acknowledged
File src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/83789/comment/1a599a48_85388d25?usp... :
PS28, Line 174: /* 48 */
Do you genuinely require these comments? I believe that lines #164 and #171 are sufficient for anyon […]
sure. I will remove these comments.
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