Attention is currently required from: Karthik Ramasubramanian, Martin Roth, Tim Van Patten.
Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75699?usp=email )
Change subject: mb/google/myst: Update PCIe romstage gpios
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Patch Set 2:
(1 comment)
File src/mainboard/google/myst/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/75699/comment/43f06cf3_e72b7be6 :
PS2, Line 207: CLK_REQ3_L
Why only CLK_REQ for SSD and not WLAN, SD.
The SSD clock request line is required before PCIe link training. I don't have strong feelings about enabling the others, but this is the same thing we did on Skyrim
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