[coreboot-gerrit] Change in coreboot[master]: mb/google/jechto: Disable PCIe AER

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46137 )

Change subject: mb/google/jechto: Disable PCIe AER
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mb/google/jechto: Disable PCIe AER

Ethernet hardware on jecht variants doesn't support AER, so
disable it to mitigate continuous AER timeout errors in dmesg.

Change-Id: Ieda82c6e13c2bbc4b3a051a3d2a7ae90728ccdc6
Signed-off-by: Matt DeVillier 
---
M src/mainboard/google/jecht/Kconfig
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/46137/1

diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig
index 7065081..4851bd7 100644
--- a/src/mainboard/google/jecht/Kconfig
+++ b/src/mainboard/google/jecht/Kconfig
@@ -56,4 +56,7 @@
    string
    default "GOOGLE"

+config PCIEXP_AER
+	def_bool n
+
 endif