Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun.
Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83950?usp=email )
Change subject: mb/goog/rex: unlock gpio wake sources ......................................................................
mb/goog/rex: unlock gpio wake sources
The power off code in depthcharge disables all GPEs prior to power off. The problem is that for gpio wake sources that are locked, this power off code cannot successfully clear any pending interrupt from that source. This can result in the device incorrectly waking back up after it's been powered off from the firmware dev screen.
BUG=b:360380950, b:359692570 BRANCH=None TEST=verify rex DUT is able to power down and stay powered down when selecting the "Power off" button in the firmware dev screen.
Change-Id: I3fdc02a82d197fd2b075e0a66c578149cef3a69f Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/rex/variants/karis/gpio.c M src/mainboard/google/rex/variants/rex0/gpio.c M src/mainboard/google/rex/variants/screebo/gpio.c 3 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/83950/1
diff --git a/src/mainboard/google/rex/variants/karis/gpio.c b/src/mainboard/google/rex/variants/karis/gpio.c index 1073f06..0bc8f3d 100644 --- a/src/mainboard/google/rex/variants/karis/gpio.c +++ b/src/mainboard/google/rex/variants/karis/gpio.c @@ -47,7 +47,7 @@ PAD_NC(GPP_A21, NONE),
/* GPP_B00 : [] ==> TCHPAD_INT_ODL_LS */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_B00, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_B00, NONE, PWROK, LEVEL, INVERT), /* GPP_B01 : [] ==> BT_DISABLE_L */ PAD_CFG_GPO(GPP_B01, 1, DEEP), /* GPP_B02 : net NC is not present in the given design */ @@ -208,7 +208,7 @@ /* GPP_E09 : SOC_PEN_DETECT */ PAD_CFG_GPI_SCI_LOCK(GPP_E09, NONE, EDGE_SINGLE, NONE, LOCK_CONFIG), /* GPP_E10 : [] ==> SOC_FPMCU_INT_L */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_E10, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_E10, NONE, PWROK, LEVEL, INVERT), /* GPP_E11 : [] ==> MEM_STRAP_0 */ PAD_CFG_GPI_LOCK(GPP_E11, NONE, LOCK_CONFIG), /* GPP_E12 : [] ==> MEM_STRAP_3 */ diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c index d492bd1..5a5cebb 100644 --- a/src/mainboard/google/rex/variants/rex0/gpio.c +++ b/src/mainboard/google/rex/variants/rex0/gpio.c @@ -51,7 +51,7 @@ PAD_CFG_GPI(GPP_A21, NONE, DEEP),
/* GPP_B00 : [] ==> TCHPAD_INT_ODL_LS */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_B00, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_B00, NONE, PWROK, LEVEL, INVERT), /* GPP_B01 : [] ==> BT_DISABLE_L */ PAD_CFG_GPO(GPP_B01, 1, DEEP), /* GPP_B02 : net NC is not present in the given design */ @@ -214,7 +214,7 @@ /* GPP_E09 : No heuristic was found useful */ PAD_CFG_NF_LOCK(GPP_E09, NONE, NF1, LOCK_CONFIG), /* GPP_E10 : [] ==> SOC_FPMCU_INT_L */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_E10, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_E10, NONE, PWROK, LEVEL, INVERT), /* GPP_E11 : [] ==> MEM_STRAP_0 */ PAD_CFG_GPI_LOCK(GPP_E11, NONE, LOCK_CONFIG), /* GPP_E12 : [] ==> MEM_STRAP_3 */ diff --git a/src/mainboard/google/rex/variants/screebo/gpio.c b/src/mainboard/google/rex/variants/screebo/gpio.c index 9149fb4..c4fd97e 100644 --- a/src/mainboard/google/rex/variants/screebo/gpio.c +++ b/src/mainboard/google/rex/variants/screebo/gpio.c @@ -47,7 +47,7 @@ PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1),
/* GPP_B00 : [] ==> TCHPAD_INT_ODL_LS */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_B00, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_B00, NONE, PWROK, LEVEL, INVERT), /* GPP_B01 : [] ==> BT_DISABLE_L */ PAD_CFG_GPO(GPP_B01, 1, DEEP), /* GPP_B02 : net NC is not present in the given design */ @@ -215,7 +215,7 @@ /* GPP_E09 : No heuristic was found useful */ PAD_CFG_NF_LOCK(GPP_E09, NONE, NF1, LOCK_CONFIG), /* GPP_E10 : [] ==> SOC_FPMCU_INT_L */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_E10, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_E10, NONE, PWROK, LEVEL, INVERT), /* GPP_E11 : [] ==> MEM_STRAP_0 */ PAD_CFG_GPI_LOCK(GPP_E11, NONE, LOCK_CONFIG), /* GPP_E12 : [] ==> MEM_STRAP_3 */