[coreboot-gerrit] Change in ...coreboot[master]: coreboot: add post code for critical CBFS failures

[Keith Short (Code Review)]

Keith Short has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32771

Change subject: coreboot: add post code for critical CBFS failures
......................................................................

coreboot: add post code for critical CBFS failures

Add a new post code POST_INVALID_CBS, used when coreboot fails to locate
or validate a resource that is stored in CBFS.

BUG=b:124401932
BRANCH=sarien
TEST=build coreboot for sarien and arcada platforms

Change-Id: If1c8b92889040f9acd6250f847db02626809a987
Signed-off-by: Keith Short 
---
M src/arch/x86/postcar_loader.c
M src/include/console/post_codes.h
M src/soc/intel/quark/romstage/fsp2_0.c
3 files changed, 13 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/32771/1

diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index 9975931..e2a01cd 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -141,17 +141,17 @@
    };

if (prog_locate(prog)) {
-		post_code(POST_INVALID_ROM);
+		post_code(POST_INVALID_CBFS);
    	die("Failed to locate after CAR program.\n");
    }
    if (rmodule_stage_load(&rsl)) {
-		post_code(POST_INVALID_ROM);
+		post_code(POST_INVALID_CBFS);
    	die("Failed to load after CAR program.\n");
    }

/* Set the stack pointer within parameters of the program loaded. */
    if (rsl.params == NULL) {
-		post_code(POST_INVALID_ROM);
+		post_code(POST_INVALID_CBFS);
    	die("No parameters found in after CAR program.\n");
    }

diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index 89a65ca..637083a 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -326,6 +326,13 @@
 #define POST_INVALID_ROM			0xE0

/**
+ * \brief Invalid or corrupt CBFS
+ *
+ * Set if firmware failed to find or validate a resource that is stored in CBFS.
+ */
+#define POST_INVALID_CBFS			0xE1
+
+/**
  * \brief TPM failure
  *
  * An error with the TPM, either unexepcted state or communications failure.
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index 31e130a..280ae37 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -116,8 +116,10 @@

/* Locate the RMU data file in flash */
    rmu_data = locate_rmu_file(&rmu_data_len);
-	if (!rmu_data)
+	if (!rmu_data) {
+		post_code(POST_INVALID_CBFS);
    	die("Microcode file (rmu.bin) not found.");
+	}

/* Locate the configuration data from devicetree.cb */
    dev = pcidev_path_on_root(LPC_DEV_FUNC);