Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Kapil Porwal, Saurabh Mishra, Subrata Banik, Tarun.
Jérémy Compostella has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
......................................................................
Patch Set 16:
(6 comments)
File src/soc/intel/pantherlake/include/soc/p2sb.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/aebff548_2cdfbcfd?usp... :
PS16, Line 7: (1 << 7)
`BIT(7)` ?
File src/soc/intel/pantherlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/70ea3c5d_a3de2a7b?usp... :
PS16, Line 61: xb
0x0b
https://review.coreboot.org/c/coreboot/+/83354/comment/2763fd80_27571131?usp... :
PS16, Line 65: 0xc
0x0c
https://review.coreboot.org/c/coreboot/+/83354/comment/929980ca_c47fa866?usp... :
PS16, Line 219: #endif //_SOC_PANTHERLAKE_PCI_DEVS_H_
Shouldn't this be at the end of the file ?
File src/soc/intel/pantherlake/include/soc/pcr_ids.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/b92cf160_7c1d457f?usp... :
PS16, Line 8: #define PID_GPIOCOM0 0x59
Where do these PID values come from ?
File src/soc/intel/pantherlake/include/soc/pm.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/18079973_9458722e?usp... :
PS16, Line 7: (1 << 15)
Could we use the `BIT` macro instead ?
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