[coreboot-gerrit] Change in coreboot[master]: ec/google/chromeec: Fix loop off-by-one error in DPTF _OSC

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43827 )

Change subject: ec/google/chromeec: Fix loop off-by-one error in DPTF _OSC
......................................................................

ec/google/chromeec: Fix loop off-by-one error in DPTF _OSC

The while loop in _SB.DPTF._OSC accidentally used <= instead of <, so
there was an error indexing into IDSP.

BUG=b:162043345
TEST=verify disassembled ASL, as well as no BIOS bug mentioned in
/var/log/messages

Signed-off-by: Tim Wawrzynczak 
Change-Id: I08c4152c59cc9eb13386c825aab983681cfa88ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43827
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Karthik Ramasubramanian 
---
M src/ec/google/chromeec/ec_dptf_helpers.c
1 file changed, 2 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/ec/google/chromeec/ec_dptf_helpers.c b/src/ec/google/chromeec/ec_dptf_helpers.c
index 0f8d4a3..631f16e 100644
--- a/src/ec/google/chromeec/ec_dptf_helpers.c
+++ b/src/ec/google/chromeec/ec_dptf_helpers.c
@@ -135,7 +135,7 @@
     * Local1 = 0
     * Local2 = 0
     *
-	 * While (Local1 < Local) {
+	 * While (Local1 < Local0) {
     *    If (IDSP[Local1] == Arg0 && Arg1 == enabled) {
     *        Local2 = 1
     *    }
@@ -167,8 +167,7 @@
     */
    acpigen_emit_byte(WHILE_OP);
    acpigen_write_len_f();
-	acpigen_emit_byte(LNOT_OP);
-	acpigen_emit_byte(LGREATER_OP);
+	acpigen_emit_byte(LLESS_OP);
    acpigen_emit_byte(LOCAL1_OP);
    acpigen_emit_byte(LOCAL0_OP);