Attention is currently required from: Eric Lai, Kane Chen, Kapil Porwal, Paul Menzel, Subrata Banik, Tarun Tuli.
Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74769?usp=email )
Change subject: soc/intel/meteorlake: Add support for crashlog ......................................................................
Patch Set 24:
(5 comments)
Patchset:
PS23:
couple of questions […]
1. I don’t see any redundant entries.
in crashlog.h #define CRASHLOG_DESCRIPTOR_TABLE_TAG_SOC 0x0 #define CRASHLOG_DESCRIPTOR_TABLE_TAG_IOE 0x1
We parse descriptor table to learn about crashlog records in SOC PMC, and OIE PMC SRAM. Both data has different tags. Tag=7 contain BDF info for IOE PMC SRAM device, but since we already define it in header (#define PCI_DEV_IOE_SRAM) i don’t parse the tag=7. We parse descriptor table entries with tag=0 and tag=1 only. In first pass we collect SOC PMC crashlog records and also count IOE PMC records. This is needed to allocate right size of cbmem for IOE crashlog data. After this parsing i allocate CBMEM for IOE crashlog and parse descriptor table again to collect IOE crashlog data.
2. while copying data from SRAM, we ignore invalid crashlog entries. So the final size of crashlog is adjusted.
3. that is coming from common code, pushed another patch.
File src/soc/intel/meteorlake/crashlog.c:
https://review.coreboot.org/c/coreboot/+/74769/comment/33f89360_321599ff : PS23, Line 81: BIOS_ERROR
BIOS_ERR
Done
https://review.coreboot.org/c/coreboot/+/74769/comment/c3e719a8_ebd7ab14 : PS23, Line 86: BIOS_ERROR
BIOS_ERR
Done
https://review.coreboot.org/c/coreboot/+/74769/comment/27b98e29_e3db8073 : PS23, Line 91: BIOS_ERROR
BIOS_ERR
Done
File src/soc/intel/meteorlake/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/74769/comment/b69390aa_ff2d35cf : PS23, Line 63: TMT
I don't believe TMT is a good short form of `telemetry` […]
Done