Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35494 )
Change subject: sc7180: Provide initial SoC support ......................................................................
Patch Set 7:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35494/7/src/soc/qualcomm/sc7180/inc... File src/soc/qualcomm/sc7180/include/soc/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/35494/7/src/soc/qualcomm/sc7180/inc... PS7, Line 19: 0x146AE000 Uhh... still doesn't match the number below? (SSRAM_END is 0x146A6000)
https://review.coreboot.org/c/coreboot/+/35494/7/src/soc/qualcomm/sc7180/inc... PS7, Line 56: 384K nit: Should also be bumped to 16M (see my earlier comment)
https://review.coreboot.org/c/coreboot/+/35494/7/src/soc/qualcomm/sc7180/inc... File src/soc/qualcomm/sc7180/include/soc/symbols.h:
https://review.coreboot.org/c/coreboot/+/35494/7/src/soc/qualcomm/sc7180/inc... PS7, Line 21: ; nit: These aren't supposed to have a semicolon (see src/include/symbols.h).