Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Duncan Laurie, Bora Guvendik, Subrata Banik, Selma Bensaid, Aamir Bohra, Bernardo Perez Priego, Patrick Rudolph, Venkata Krishna Nimmagadda,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41712
to look at the new patch set (#3).
Change subject: soc/intel/common: Add restore and enable GPIO PM
......................................................................
soc/intel/common: Add restore and enable GPIO PM
Enable GPIO clock gating when enter s0ix/Sx and save the PM bits.
Restore the PM bits when exit s0ix/Sx. This reference CB:37685.
BUG=b:157280323
TEST=Check GPIO PM bits when enter/exit s0ix are expected
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com
Change-Id: If5e4553d568a872de234a2d671118acbae0a6159
---
M src/soc/intel/common/acpi/gpio.asl
1 file changed, 42 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/41712/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If5e4553d568a872de234a2d671118acbae0a6159
Gerrit-Change-Number: 41712
Gerrit-PatchSet: 3
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