Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56284 )
Change subject: soc/amd/common/blocks/cpu/mca: factor out common BERT helper functions ......................................................................
soc/amd/common/blocks/cpu/mca: factor out common BERT helper functions
Change-Id: I03365c3820cbe7277f14adc5460e892fb8d9b7a5 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/common/block/cpu/mca/Makefile.inc M src/soc/amd/common/block/cpu/mca/mca_bert.c A src/soc/amd/common/block/cpu/mca/mca_common_bert.c A src/soc/amd/common/block/cpu/mca/mca_common_defs.h M src/soc/amd/common/block/cpu/mca/mcax_bert.c 5 files changed, 60 insertions(+), 71 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/56284/1
diff --git a/src/soc/amd/common/block/cpu/mca/Makefile.inc b/src/soc/amd/common/block/cpu/mca/Makefile.inc index 5c1d2c5..61d6974 100644 --- a/src/soc/amd/common/block/cpu/mca/Makefile.inc +++ b/src/soc/amd/common/block/cpu/mca/Makefile.inc @@ -1,3 +1,7 @@ -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCA_COMMON) += mca_common.c +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_MCA_COMMON),y) +ramstage-y += mca_common.c +ramstage-y += mca_common_bert.c +endif # CONFIG_SOC_AMD_COMMON_BLOCK_MCA_COMMON + ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCA) += mca_bert.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_MCAX) += mcax_bert.c diff --git a/src/soc/amd/common/block/cpu/mca/mca_bert.c b/src/soc/amd/common/block/cpu/mca/mca_bert.c index ffd8973..93d5749 100644 --- a/src/soc/amd/common/block/cpu/mca/mca_bert.c +++ b/src/soc/amd/common/block/cpu/mca/mca_bert.c @@ -8,6 +8,7 @@ #include <arch/bert_storage.h> #include <cper.h> #include <types.h> +#include "mca_common_defs.h"
static inline size_t mca_report_size_reqd(void) { @@ -36,41 +37,6 @@ return size; }
-static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci) -{ - int error = mca_err_type(mci->sts); - - if (error == MCA_ERRTYPE_BUS) - return X86_PROCESSOR_BUS_CHK; - if (error == MCA_ERRTYPE_INT) - return X86_PROCESSOR_MS_CHK; - if (error == MCA_ERRTYPE_MEM) - return X86_PROCESSOR_CACHE_CHK; - if (error == MCA_ERRTYPE_TLB) - return X86_PROCESSOR_TLB_CHK; - - return X86_PROCESSOR_MS_CHK; /* unrecognized */ -} - -/* Fill additional information in the Generic Processor Error Section. */ -static void fill_generic_section(cper_proc_generic_error_section_t *sec, - struct mca_bank_status *mci) -{ - int type = mca_err_type(mci->sts); - - if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */ - sec->error_type = GENPROC_ERRTYPE_BUS; - else if (type == MCA_ERRTYPE_INT) - sec->error_type = GENPROC_ERRTYPE_UARCH; - else if (type == MCA_ERRTYPE_MEM) - sec->error_type = GENPROC_ERRTYPE_CACHE; - else if (type == MCA_ERRTYPE_TLB) - sec->error_type = GENPROC_ERRTYPE_TLB; - else - sec->error_type = GENPROC_ERRTYPE_UNKNOWN; - sec->validation |= GENPROC_VALID_PROC_ERR_TYPE; -} - /* Convert an error reported by an MCA bank into BERT information to be reported * by the OS. The ACPI driver doesn't recognize/parse the IA32/X64 structure, * which is the best method to report MSR context. As a result, add two diff --git a/src/soc/amd/common/block/cpu/mca/mca_common_bert.c b/src/soc/amd/common/block/cpu/mca/mca_common_bert.c new file mode 100644 index 0000000..53a73d6 --- /dev/null +++ b/src/soc/amd/common/block/cpu/mca/mca_common_bert.c @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/mca.h> +#include <cper.h> +#include <types.h> +#include "mca_common_defs.h" + +enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci) +{ + int error = mca_err_type(mci->sts); + + if (error == MCA_ERRTYPE_BUS) + return X86_PROCESSOR_BUS_CHK; + if (error == MCA_ERRTYPE_INT) + return X86_PROCESSOR_MS_CHK; + if (error == MCA_ERRTYPE_MEM) + return X86_PROCESSOR_CACHE_CHK; + if (error == MCA_ERRTYPE_TLB) + return X86_PROCESSOR_TLB_CHK; + + return X86_PROCESSOR_MS_CHK; /* unrecognized */ +} + +/* Fill additional information in the Generic Processor Error Section. */ +void fill_generic_section(cper_proc_generic_error_section_t *sec, + struct mca_bank_status *mci) +{ + int type = mca_err_type(mci->sts); + + if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */ + sec->error_type = GENPROC_ERRTYPE_BUS; + else if (type == MCA_ERRTYPE_INT) + sec->error_type = GENPROC_ERRTYPE_UARCH; + else if (type == MCA_ERRTYPE_MEM) + sec->error_type = GENPROC_ERRTYPE_CACHE; + else if (type == MCA_ERRTYPE_TLB) + sec->error_type = GENPROC_ERRTYPE_TLB; + else + sec->error_type = GENPROC_ERRTYPE_UNKNOWN; + sec->validation |= GENPROC_VALID_PROC_ERR_TYPE; +} diff --git a/src/soc/amd/common/block/cpu/mca/mca_common_defs.h b/src/soc/amd/common/block/cpu/mca/mca_common_defs.h new file mode 100644 index 0000000..41d73d8 --- /dev/null +++ b/src/soc/amd/common/block/cpu/mca/mca_common_defs.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_BLOCK_MCA_COMMON_DEF_H +#define AMD_BLOCK_MCA_COMMON_DEF_H + +#include <amdblocks/mca.h> +#include <cper.h> + +enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci); +void fill_generic_section(cper_proc_generic_error_section_t *sec, struct mca_bank_status *mci); + +#endif /* AMD_BLOCK_MCA_COMMON_DEF_H */ diff --git a/src/soc/amd/common/block/cpu/mca/mcax_bert.c b/src/soc/amd/common/block/cpu/mca/mcax_bert.c index f976158..8d864e8 100644 --- a/src/soc/amd/common/block/cpu/mca/mcax_bert.c +++ b/src/soc/amd/common/block/cpu/mca/mcax_bert.c @@ -8,6 +8,7 @@ #include <arch/bert_storage.h> #include <cper.h> #include <types.h> +#include "mca_common_defs.h"
/* MISC4 is the last used register in the MCAX banks of Picasso */ #define MCAX_USED_REGISTERS_PER_BANK (MCAX_MISC4_OFFSET + 1) @@ -40,41 +41,6 @@ return size; }
-static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci) -{ - int error = mca_err_type(mci->sts); - - if (error == MCA_ERRTYPE_BUS) - return X86_PROCESSOR_BUS_CHK; - if (error == MCA_ERRTYPE_INT) - return X86_PROCESSOR_MS_CHK; - if (error == MCA_ERRTYPE_MEM) - return X86_PROCESSOR_CACHE_CHK; - if (error == MCA_ERRTYPE_TLB) - return X86_PROCESSOR_TLB_CHK; - - return X86_PROCESSOR_MS_CHK; /* unrecognized */ -} - -/* Fill additional information in the Generic Processor Error Section. */ -static void fill_generic_section(cper_proc_generic_error_section_t *sec, - struct mca_bank_status *mci) -{ - int type = mca_err_type(mci->sts); - - if (type == MCA_ERRTYPE_BUS) /* try to map MCA errors to CPER types */ - sec->error_type = GENPROC_ERRTYPE_BUS; - else if (type == MCA_ERRTYPE_INT) - sec->error_type = GENPROC_ERRTYPE_UARCH; - else if (type == MCA_ERRTYPE_MEM) - sec->error_type = GENPROC_ERRTYPE_CACHE; - else if (type == MCA_ERRTYPE_TLB) - sec->error_type = GENPROC_ERRTYPE_TLB; - else - sec->error_type = GENPROC_ERRTYPE_UNKNOWN; - sec->validation |= GENPROC_VALID_PROC_ERR_TYPE; -} - /* Convert an error reported by an MCA bank into BERT information to be reported * by the OS. The ACPI driver doesn't recognize/parse the IA32/X64 structure, * which is the best method to report MSR context. As a result, add two