Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford.
Hello Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85529?usp=email
to look at the new patch set (#3).
The following approvals got outdated and were removed: Code-Review+1 by Eric Lai, Verified+1 by build bot (Jenkins)
Change subject: soc/intel/alderlake: Add a function to force disable memory channels ......................................................................
soc/intel/alderlake: Add a function to force disable memory channels
Add a function `mem_init_override_channel_mask` to disable memory channels based on given bitmap where each bit represents a memory channel. A set bit will disable corresponding memory channel. Variants can override this bitmap using `variant_mem_ch_disable_mask`.
BUG=b:379311559 TEST=Make sure that channel mask is applied correctly.
Lotso without any channel mask: ``` lotso-rev0 ~ # dmidecode -t 17 | grep -E "(Locator: C|Size)" Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-2-DIMM-0 Size: 2 GB Locator: Channel-3-DIMM-0 Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-2-DIMM-0 Size: 2 GB Locator: Channel-3-DIMM-0
lotso-rev0 ~ # dmidecode -t 17 | grep Size | wc -l 8 ```
Lotso with channel 2 & 3 masked: ``` lotso-rev0 ~ # dmidecode -t 17 | grep -E "(Locator: C|Size)" Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0
lotso-rev0 ~ # dmidecode -t 17 | grep Size | wc -l 4 ```
Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Signed-off-by: Kapil Porwal kapilporwal@google.com --- M src/mainboard/aoostar/wtr_r1/romstage_fsp_params.c M src/mainboard/cwwk/adl/romstage_fsp_params.c M src/mainboard/google/brox/romstage.c M src/mainboard/google/brox/variants/baseboard/brox/memory.c M src/mainboard/google/brox/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/brya/romstage.c M src/mainboard/google/brya/variants/baseboard/brask/memory.c M src/mainboard/google/brya/variants/baseboard/brya/memory.c M src/mainboard/google/brya/variants/baseboard/hades/memory.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/brya/variants/baseboard/nissa/memory.c M src/mainboard/google/brya/variants/baseboard/trulo/memory.c M src/mainboard/hardkernel/odroid-h4/romstage_fsp_params.c M src/mainboard/intel/adlrvp/romstage_fsp_params.c M src/mainboard/intel/shadowmountain/romstage.c M src/mainboard/lattepanda/mu/romstage_fsp_params.c M src/mainboard/msi/ms7d25/romstage_fsp_params.c M src/mainboard/msi/ms7e06/romstage_fsp_params.c M src/mainboard/prodrive/atlas/romstage_fsp_params.c M src/mainboard/protectli/vault_adl_p/romstage_fsp_params.c M src/mainboard/starlabs/byte_adl/variants/mk_ii/romstage.c M src/mainboard/starlabs/starbook/variants/adl/romstage.c M src/mainboard/starlabs/starbook/variants/rpl/romstage.c M src/mainboard/starlabs/starfighter/variants/rpl/romstage.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c M src/mainboard/system76/adl/variants/darp8/romstage.c M src/mainboard/system76/adl/variants/galp6/romstage.c M src/mainboard/system76/adl/variants/gaze17-3050/romstage.c M src/mainboard/system76/adl/variants/gaze17-3060-b/romstage.c M src/mainboard/system76/adl/variants/lemp11/romstage.c M src/mainboard/system76/adl/variants/oryp10/romstage.c M src/mainboard/system76/adl/variants/oryp9/romstage.c M src/mainboard/system76/rpl/variants/addw3/romstage.c M src/mainboard/system76/rpl/variants/addw4/romstage.c M src/mainboard/system76/rpl/variants/bonw15/romstage.c M src/mainboard/system76/rpl/variants/darp9/romstage.c M src/mainboard/system76/rpl/variants/galp7/romstage.c M src/mainboard/system76/rpl/variants/gaze18/romstage.c M src/mainboard/system76/rpl/variants/lemp12/romstage.c M src/mainboard/system76/rpl/variants/oryp11/romstage.c M src/mainboard/system76/rpl/variants/oryp12/romstage.c M src/mainboard/system76/rpl/variants/serw13/romstage.c M src/mainboard/topton/adl/romstage_fsp_params.c M src/soc/intel/alderlake/include/soc/meminit.h M src/soc/intel/alderlake/meminit.c 45 files changed, 182 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85529/3