[coreboot-gerrit] Change in coreboot[master]: soc/amd: Show SPI settings in bootblock

[Martin Roth (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held.
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56961 )

Change subject: soc/amd: Show SPI settings in bootblock
......................................................................

soc/amd: Show SPI settings in bootblock

BUG=b:194919326
TEST=See SPI settings in bootblock

Signed-off-by: Martin Roth 
Change-Id: I8ee8981986990240b09414cde8b84d9b109cb5b2
---
M src/soc/amd/cezanne/early_fch.c
M src/soc/amd/picasso/early_fch.c
M src/soc/amd/stoneyridge/southbridge.c
3 files changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/56961/1

diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 9da154c..16a8a53 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -73,6 +73,7 @@
    pm_set_power_failure_state();
    fch_print_pmxc0_status();
    i2c_soc_early_init();
+	show_spi_speeds_and_modes();

if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
    	lpc_disable_spi_rom_sharing();
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c
index 88011c1..110718e 100644
--- a/src/soc/amd/picasso/early_fch.c
+++ b/src/soc/amd/picasso/early_fch.c
@@ -75,6 +75,7 @@
    pm_set_power_failure_state();
    fch_print_pmxc0_status();
    i2c_soc_early_init();
+	show_spi_speeds_and_modes();

if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
    	lpc_disable_spi_rom_sharing();
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 5f5fc72..7493770 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -357,6 +357,7 @@
 {
    pm_set_power_failure_state();
    fch_print_pmxc0_status();
+	show_spi_speeds_and_modes();
 }

static void fch_init_acpi_ports(void)