Attention is currently required from: Shelley Chen, Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56791 )
Change subject: soc/mediatek: Add PCIe support ......................................................................
Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56791/comment/ef72d5c5_5d5ed60c PS3, Line 11:
- What datasheets (name, revision and section) were used to implement this? […]
- What datasheets (name, revision and section) were used to implement this?
MT8195 Register Map V0.3-2, Chapter 3.18 PCIe controller (Page 1250). Should I add this information in commit message?
- How has this been tested?
Build pass and boot up to kernel successfully via SSD.
File src/include/device/pci_mmio_cfg.h:
https://review.coreboot.org/c/coreboot/+/56791/comment/e2ecd297_6e5f6ed0 PS3, Line 50: pcicfg
Okay, but please do it in a separate patch. Please also move the change in this file to that patch.
Done
File src/soc/mediatek/common/pcie.c:
https://review.coreboot.org/c/coreboot/+/56791/comment/1981ba29_cd30cdf8 PS3, Line 85: static inline int mtk_fls(int x)
Should this be a common function?
Agree, do you have any suggestions on which file this function should be added to?