Bernardo Perez Priego has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56247 )
Change subject: mb/intel/adlrvp_m: Enable I2C touch panel ......................................................................
mb/intel/adlrvp_m: Enable I2C touch panel
Signed-off-by: Bernardo Perez Priego bernardo.perez.priego@intel.com Change-Id: I37c0831485135fda3284dda6b61f4825b7fc51a3 --- M src/mainboard/intel/adlrvp/devicetree_m.cb M src/mainboard/intel/adlrvp/gpio_m.c 2 files changed, 22 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/56247/1
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index 34aee72..e715dab 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -212,6 +212,20 @@ end end device ref i2c0 on end + chip drivers/i2c/hid + register "generic.hid" = ""ELAN7300"" + register "generic.desc" = ""ELAN Touchscreen"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F18_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F17)" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F7)" + register "generic.enable_delay_ms" = "1" + register "generic.reset_delay_ms" = "300" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 0a on end + end device ref i2c1 on chip drivers/intel/mipi_camera register "acpi_hid" = ""OVTI5675"" diff --git a/src/mainboard/intel/adlrvp/gpio_m.c b/src/mainboard/intel/adlrvp/gpio_m.c index d5eeffa..f6230cf 100644 --- a/src/mainboard/intel/adlrvp/gpio_m.c +++ b/src/mainboard/intel/adlrvp/gpio_m.c @@ -159,7 +159,14 @@ PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2),
/* S7 : SNDW4_DATA */ - PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2) + PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), + + /* F7 : TCH_PNL_PWR_EN */ + PAD_CFG_GPO(GPP_F7, 1, PLTRST), + /* F17 : RST_N_TCH_PNL2 */ + PAD_CFG_GPO(GPP_F17, 1, PLTRST), + /* F18 : INT_N_TCH_PNL2 */ + PAD_CFG_GPI_APIC(GPP_F18, NONE, PLTRST, LEVEL, NONE) };
void variant_configure_gpio_pads(void)