Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74993?usp=email )
Change subject: soc/amd/picasso/acpi/northbridge: drop _STA method from PCI0 scope ......................................................................
soc/amd/picasso/acpi/northbridge: drop _STA method from PCI0 scope
The PCI root complex itself isn't on an enumerable bus, so without providing an _STA method, the device will still be assumed to be present and visible, so this won't change behavior. This also brings Picasso more in line with Cezanne and newer SoCs.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Suggested-by: Nico Huber nico.h@gmx.de Change-Id: Ied48b48113f6e871e90d17cbd216be003f05b5ef Reviewed-on: https://review.coreboot.org/c/coreboot/+/74993 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/amd/picasso/acpi/northbridge.asl 1 file changed, 0 insertions(+), 5 deletions(-)
Approvals: Arthur Heymans: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/amd/picasso/acpi/northbridge.asl b/src/soc/amd/picasso/acpi/northbridge.asl index 5cbe950..bec9b46 100644 --- a/src/soc/amd/picasso/acpi/northbridge.asl +++ b/src/soc/amd/picasso/acpi/northbridge.asl @@ -2,11 +2,6 @@
/* Describe the Northbridge devices */
-Method(_STA, 0, NotSerialized) -{ - Return(0x0f) /* Status is visible */ -} - /* PCI Routing Table */ Name(PR0, Package(){ /* Bus 0, Dev 0x00 - F2: IOMMU */