Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5899
-gerrit
commit 7b83a3b0b4afe8431ef8f1acaffa124b49186b0c Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Sun Jun 1 18:04:05 2014 +1000
superio/ite/it8772f: Move towards removing #include .c
Move samsung/stumpy board towards generic romstage component and away from poorly written hard-coded model specific Super I/O component. This is an incremental step towards getting obj-level abstraction between board and Super I/O.
Change-Id: I358c5abef85c2ffa1b7178025cde8834a35b0a51 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/samsung/stumpy/romstage.c | 12 ++++++++---- src/superio/ite/it8772f/early_serial.c | 21 ++------------------- src/superio/ite/it8772f/it8772f.h | 10 +++++----- 3 files changed, 15 insertions(+), 28 deletions(-)
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 0067cb5..0ae71a8 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -31,7 +31,9 @@ #include <cbmem.h> #include <console/console.h> #include <bootmode.h> -#include "superio/ite/it8772f/it8772f.h" +#include <superio/ite/common/ite.h> +#include <superio/ite/it8772f/it8772f.h> +/* FIXME: SUPERIO include.c */ #include "superio/ite/it8772f/early_serial.c" #include "northbridge/intel/sandybridge/sandybridge.h" #include "northbridge/intel/sandybridge/raminit.h" @@ -58,6 +60,9 @@ #endif #define USB_RESET_DISABLE_MAGIC (0xdd) /* Disable if set to this */
+#define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) + static void pch_enable_lpc(void) { /* Set COM1/COM2 decode range */ @@ -233,10 +238,9 @@ void main(unsigned long bist) setup_sio_gpios();
/* Early SuperIO setup */ - it8772f_kill_watchdog(); it8772f_ac_resume_southbridge(); - it8772f_enable_serial(PNP_DEV(IT8772F_BASE, IT8772F_SP1), - CONFIG_TTYS0_BASE); + ite_kill_watchdog(GPIO_DEV); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init();
init_bootmode_straps(); diff --git a/src/superio/ite/it8772f/early_serial.c b/src/superio/ite/it8772f/early_serial.c index 8bf2964..e9db117 100644 --- a/src/superio/ite/it8772f/early_serial.c +++ b/src/superio/ite/it8772f/early_serial.c @@ -22,6 +22,8 @@ #include <device/pnp_def.h> #include "it8772f.h"
+/* NOTICE: This file is deprecated, use ite/common instead */ + /* The base address is 0x2e or 0x4e, depending on config bytes. */ #define SIO_BASE IT8772F_BASE #define SIO_INDEX SIO_BASE @@ -85,25 +87,6 @@ void it8772f_enable_3vsbsw(void) it8772f_exit_conf(); }
-void it8772f_kill_watchdog(void) -{ - it8772f_enter_conf(); - it8772f_sio_write(IT8772F_CONFIG_REG_LDN, IT8772F_GPIO); - it8772f_sio_write(IT8772F_CONFIG_REG_WATCHDOG, 0x00); - it8772f_exit_conf(); -} - -/* Enable the serial port(s). */ -void it8772f_enable_serial(device_t dev, u16 iobase) -{ - it8772f_enter_conf(); - it8772f_sio_write(IT8772F_CONFIG_REG_LDN, dev & 0xff); - it8772f_sio_write(PNP_IDX_IO0, (iobase >> 8) & 0xff); - it8772f_sio_write(PNP_IDX_IO0+1, iobase & 0xff); - it8772f_sio_write(PNP_IDX_EN, 1); - it8772f_exit_conf(); -} - /* Set AC resume to be up to the Southbridge */ void it8772f_ac_resume_southbridge(void) { diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h index f881d7a..3d45f09 100644 --- a/src/superio/ite/it8772f/it8772f.h +++ b/src/superio/ite/it8772f/it8772f.h @@ -18,9 +18,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef SUPERIO_ITE_IT8772F_IT8772F_H -#define SUPERIO_ITE_IT8772F_IT8772F_H +#ifndef SUPERIO_ITE_IT8772F_H +#define SUPERIO_ITE_IT8772F_H
+/* FIXME: SUPERIO include.c */ #define IT8772F_BASE 0x2e
#define IT8772F_FDC 0x00 /* Floppy disk controller */ @@ -107,11 +108,10 @@
u8 it8772f_sio_read(u8 index); void it8772f_sio_write(u8 index, u8 value); -void it8772f_enable_serial(device_t dev, u16 iobase); -void it8772f_kill_watchdog(void); void it8772f_24mhz_clkin(void); void it8772f_enable_3vsbsw(void); void it8772f_ac_resume_southbridge(void); void it8772f_gpio_setup(int set, u8 func_select, u8 polarity, u8 pullup, u8 output, u8 enable); -#endif + +#endif /* SUPERIO_ITE_IT8772F_H */