Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60449 )
Change subject: mb/google/brya/var/kano: Enable stylus pen power ......................................................................
mb/google/brya/var/kano: Enable stylus pen power
Set GPP_D16 (PEN_PWR_EN) to output high.
BUG=b:195853169 TEST=build pass.
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I25b6d1a40ed0939b303a03984cb0087fb6cab4d7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60449 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/brya/variants/kano/gpio.c 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/kano/gpio.c b/src/mainboard/google/brya/variants/kano/gpio.c index e8c9032..6f74e25 100644 --- a/src/mainboard/google/brya/variants/kano/gpio.c +++ b/src/mainboard/google/brya/variants/kano/gpio.c @@ -36,6 +36,8 @@ PAD_NC(GPP_D7, NONE), /* D8 : SRCCLKREQ3# ==> NC */ PAD_NC(GPP_D8, NONE), + /* D16 : ISH_UART0_CTS# ==> PEN_PWR_EN */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), /* D17 : UART1_RXD ==> APU_PEN_DETECT_ODL */ PAD_CFG_GPI_SCI(GPP_D17, NONE, DEEP, EDGE_SINGLE, NONE), /* D18 : UART1_TXD ==> NC */