Attention is currently required from: Tim Crawford, Nico Huber, Jeremy Soller, Tim Wawrzynczak, Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57034 )
Change subject: drivers/gfx/nvidia: Add driver for NVIDIA Optimus ......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57034/comment/f1e19067_397e5934 PS2, Line 10: GC6
What does GC6 mean?
It's just graphics power states. https://patents.google.com/patent/US20190163255A1/en
File src/drivers/gfx/nvidia/acpi/gpu.asl:
https://review.coreboot.org/c/coreboot/+/57034/comment/3fb7e2e4_a011d6e3 PS2, Line 108: Debug = " Q0L0 = 1" : Q0L0 = 1 : : Debug = " Sleep 16" : Sleep (16) : : Debug = " While Q0L0" : Local0 = 0 : While (Q0L0) { : If ((Local0 > 4)) { : Debug = " While Q0L0 timeout" : Break : } : : Sleep (16) : Local0++ : } : : Debug = " P0RM = 0" : P0RM = 0 : : Debug = " P0AP = 0" : P0AP = 0 I don't know if you based this on reference code, but this part looks specific to PEG. Optimus on ULT platforms uses a PCH PCIe root port, and this would be different.
Delving deeper into code, looks like this code enables/disables the dGPU without disabling the PCIe link on the PEG side. Looks like one can also power off the PEG port's bundles to save more power, but it rather complicated: it requires saving and restoring register values of its PCI config space and knowing which bundles to power on/off (depends on e.g. PEG bifurcation).
https://review.coreboot.org/c/coreboot/+/57034/comment/69048e87_5a52e556 PS2, Line 153: Debug = " Q0L2 = 1" : Q0L2 = 1 : : Debug = " Sleep 16" : Sleep (16) : : Debug = " While Q0L2" : Local0 = Zero : While (Q0L2) { : If ((Local0 > 4)) { : Debug = " While Q0L2 timeout" : Break : } : : Sleep (16) : Local0++ : } : : Debug = " P0RM = 1" : P0RM = 1 : : Debug = " P0AP = 3" : P0AP = 3 Same, this part looks specific to PEG.