Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31290 )
Change subject: Revert "cpu/x86/mtrr: Fix sign overflow" ......................................................................
Revert "cpu/x86/mtrr: Fix sign overflow"
This reverts commit 6bbc8d8050b1d51ec4bf15003a2da54e20d476c7.
The macro is used in assembly where integer suffixes are not portable.
Also, it is unclear how this can overflow as it's already the macros purpose to avoid the overflow.
Change-Id: I12c9bfe40891ae3afbfda05f60a20b59e2954aed Signed-off-by: Nico Huber nico.huber@secunet.com Reviewed-on: https://review.coreboot.org/c/31290 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/include/cpu/x86/mtrr.h 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 0398a2e..eb7d78d 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -150,7 +150,7 @@ #define _ALIGN_DOWN_POW2(x) ((x) & ~_POW2_MASK(x))
/* Calculate `4GiB - x` (e.g. absolute address for offset from 4GiB) */ -#define _FROM_4G_TOP(x) (((1UL << 20) - ((x) >> 12)) << 12) +#define _FROM_4G_TOP(x) (((1 << 20) - ((x) >> 12)) << 12)
/* At the end of romstage, low RAM 0..CACHE_TM_RAMTOP may be set * as write-back cacheable to speed up ramstage decompression.