[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: lock AES-NI MSR

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35188 )

Change subject: soc/intel/skylake: lock AES-NI MSR
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Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35188/7//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/35188/7//COMMIT_MSG@10 
PS7, Line 10: MSR datasheet.
> Sorry, what is the question here? it's an MSR

You mentioned that this locking is being done to avoid "unintended disabling". What component is doing the unintended disabling? Is that something you observed in practice? Or is this locking being done just as a precaution?