Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42831 )
Change subject: soc/amd/picasso: Use cbfs to locate the amd firmware ......................................................................
soc/amd/picasso: Use cbfs to locate the amd firmware
Switch from hardcoded locations for the AMD firmware in the RW_A & RW_B regions to locating it with cbfs.
BUG=b:154441227 TEST=None yet
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: I27b0593e0db7a9e6ba9b0633ac93b4d93954f002 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/psp_verstage/psp_verstage.c M src/soc/amd/picasso/psp_verstage/psp_verstage.h 4 files changed, 41 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/42831/1
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 4d07af6..a2321e5 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -520,16 +520,6 @@ Add a space-delimited list of filenames that should only be in the RW-B section.
-config PICASSO_FW_A_POSITION - hex - help - Location of the AMD firmware in the RW_A region - -config PICASSO_FW_B_POSITION - hex - help - Location of the AMD firmware in the RW_B region - endif # VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
endif # SOC_AMD_PICASSO diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 35bc1e7..29d1c42 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -497,12 +497,10 @@ ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) cbfs-files-y += apu/amdfw_a apu/amdfw_a-file := $(obj)/amdfw_a.rom -apu/amdfw_a-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_A_POSITION)) apu/amdfw_a-type := raw
cbfs-files-y += apu/amdfw_b apu/amdfw_b-file := $(obj)/amdfw_b.rom -apu/amdfw_b-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_B_POSITION)) apu/amdfw_b-type := raw endif
diff --git a/src/soc/amd/picasso/psp_verstage/psp_verstage.c b/src/soc/amd/picasso/psp_verstage/psp_verstage.c index de41e4c..4470c63 100644 --- a/src/soc/amd/picasso/psp_verstage/psp_verstage.c +++ b/src/soc/amd/picasso/psp_verstage/psp_verstage.c @@ -4,7 +4,10 @@
#include <bl_uapp/bl_syscall_public.h> #include <boot_device.h> +#include <cbfs.h> +#include <commonlib/region.h> #include <console/console.h> +#include <fmap.h> #include <security/vboot/misc.h> #include <security/vboot/symbols.h> #include <security/vboot/vboot_common.h> @@ -33,6 +36,21 @@ vboot_reboot(); }
+static uintptr_t locate_amdfw(const char *name, struct region_device *rdev) +{ + uint32_t cbfs_type = CBFS_TYPE_RAW; + struct cbfsf fh; + + if (!region_device_sz(&(fh.data))) { + if (cbfs_locate_file_in_region(&fh, "COREBOOT", name, &cbfs_type)) { + printk(BIOS_ERR, "Error: AMD Firmware table could not be found.\n"); + return 0; + } + } + + return (uintptr_t)rdev_mmap_full(&fh.data); +} + /* * Tell the PSP where to load the rest of the firmware from */ @@ -41,6 +59,9 @@ struct psp_ef_table *ef_table; uint32_t psp_dir_addr, bios_dir_addr; uint32_t *psp_dir_in_spi, *bios_dir_in_spi; + const char *rname, *fname; + struct region_device rdev; + uintptr_t amdfw_location;
/* Continue booting from RO */ if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) { @@ -49,14 +70,26 @@ }
if (vboot_is_firmware_slot_a(ctx)) { - printk(BIOS_SPEW, "Using FMAP RW_A region.\n"); - ef_table = (struct psp_ef_table *)((CONFIG_PICASSO_FW_A_POSITION & - SPI_ADDR_MASK) + (uint32_t)boot_dev.base); + rname = "FW_MAIN_A"; + fname = "apu/amdfw_a"; } else { - printk(BIOS_SPEW, "Using FMAP RW_B region.\n"); - ef_table = (struct psp_ef_table *)((CONFIG_PICASSO_FW_B_POSITION & - SPI_ADDR_MASK) + (uint32_t)boot_dev.base); + rname = "FW_MAIN_B"; + fname = "apu/amdfw_a"; } + printk(BIOS_DEBUG, "Using FMAP %s region.\n", rname); + + if (fmap_locate_area_as_rdev(rname, &rdev)){ + printk(BIOS_ERR, "Error: Could not locate fmap region %s.\n", rname); + return POSTCODE_FMAP_REGION_MISSING; + } + + amdfw_location = locate_amdfw(fname, &rdev); + if (!amdfw_location) { + printk(BIOS_ERR, "Error: AMD Firmware table not found.\n"); + return POSTCODE_AMD_FW_MISSING; + } + ef_table = (struct psp_ef_table *)((amdfw_location & SPI_ADDR_MASK) + + (uint32_t)boot_dev.base);
if (ef_table->signature != EMBEDDED_FW_SIGNATURE) { printk(BIOS_ERR, "Error: ROMSIG address is not correct.\n"); diff --git a/src/soc/amd/picasso/psp_verstage/psp_verstage.h b/src/soc/amd/picasso/psp_verstage/psp_verstage.h index 6fe5c7a..2b1105a 100644 --- a/src/soc/amd/picasso/psp_verstage/psp_verstage.h +++ b/src/soc/amd/picasso/psp_verstage/psp_verstage.h @@ -28,6 +28,8 @@ #define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5 #define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR 0xC6 #define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7 +#define POSTCODE_FMAP_REGION_MISSING 0xC8 +#define POSTCODE_AMD_FW_MISSING 0xc9
#define POSTCODE_UNMAP_SPI_ROM 0xF0 #define POSTCODE_UNMAP_FCH_DEVICES 0xF1