Arthur Heymans (arthur@aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16552
-gerrit
commit 90e2193f54e77095963acec6a2492d356e854352 Author: Arthur Heymans arthur@aheymans.xyz Date: Thu Sep 8 22:28:53 2016 +0200
sb/intel/i82801gx: remove conflicting acpi code.
GPIO and PMIO give confliction OPregion warnings in Linux.
Change-Id: I3b6cb00e5be2ebfb89a48fbbf5ee0cc4cf0576c9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- src/southbridge/intel/i82801gx/acpi/ich7.asl | 93 ---------------------------- 1 file changed, 93 deletions(-)
diff --git a/src/southbridge/intel/i82801gx/acpi/ich7.asl b/src/southbridge/intel/i82801gx/acpi/ich7.asl index 8a9aff4..59e40a8 100644 --- a/src/southbridge/intel/i82801gx/acpi/ich7.asl +++ b/src/southbridge/intel/i82801gx/acpi/ich7.asl @@ -27,99 +27,6 @@ Scope() TRP0, 8 // IO-Trap at 0x808 }
- // ICH7 Power Management Registers, located at PMBASE (0x1f.0 0x40.l) - OperationRegion(PMIO, SystemIO, DEFAULT_PMBASE, 0x80) - Field(PMIO, ByteAcc, NoLock, Preserve) - { - Offset(0x42), // General Purpose Control - , 1, // skip 1 bit - GPEC, 1, // TCO status - , 9, // skip 9 more bits - SCIS, 1, // TCO DMI status - , 6 // To the end of the word - } - - // ICH7 GPIO IO mapped registers (0x1f.0 reg 0x48.l) - OperationRegion(GPIO, SystemIO, DEFAULT_GPIOBASE, 0x3c) - Field(GPIO, ByteAcc, NoLock, Preserve) - { - Offset(0x00), // GPIO Use Select - GU00, 8, - GU01, 8, - GU02, 8, - GU03, 8, - Offset(0x04), // GPIO IO Select - GIO0, 8, - GIO1, 8, - GIO2, 8, - GIO3, 8, - Offset(0x0c), // GPIO Level - GP00, 1, - GP01, 1, - GP02, 1, - GP03, 1, - GP04, 1, - GP05, 1, - GP06, 1, // GDET - GP07, 1, - GP08, 1, - GP09, 1, // HPMU - GP10, 1, // GPSE - GP11, 1, - GP12, 1, // WLED - GP13, 1, // BLED - GP14, 1, // GLED - GP15, 1, // GDIS - GP16, 1, - GP17, 1, - GP18, 1, // SPCI - GP19, 1, // TSDT - GP20, 1, // SCPU - GP21, 1, - GP22, 1, - GP23, 1, // LANP - GP24, 1, // DKLR - GP25, 1, // WLAN - GP26, 1, // SATA_PWR_EN #0 / SPOF - GP27, 1, // SATA_PWR_EN #1 / SPMU - GP28, 1, - GP29, 1, - GP30, 1, - GP31, 1, - Offset(0x18), // GPIO Blink - GB00, 8, - GB01, 8, - GB02, 8, - GB03, 8, - Offset(0x2c), // GPIO Invert - GIV0, 8, - GIV1, 8, - GIV2, 8, - GIV3, 8, - Offset(0x30), // GPIO Use Select 2 - GU04, 8, - GU05, 8, - GU06, 8, - GU07, 8, - Offset(0x34), // GPIO IO Select 2 - GIO4, 8, - GIO5, 8, - GIO6, 8, - GIO7, 8, - Offset(0x38), // GPIO Level 2 - GP32, 1, - GP33, 1, // CREN - GP34, 1, // CRRS - GP35, 1, - GP36, 1, // STAD - GP37, 1, // PATA_PWR_EN / HDDE - GP38, 1, // Battery / Power (?) / MB00 - GP39, 1, // ?? / MB01 - GL05, 8, - GL06, 8, - GL07, 8 - } -
// ICH7 Root Complex Register Block. Memory Mapped through RCBA) OperationRegion(RCRB, SystemMemory, DEFAULT_RCBA, 0x4000)