[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell: Make `broadwell_init_pre_device` static

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49945 )

Change subject: soc/intel/broadwell: Make `broadwell_init_pre_device` static
......................................................................

soc/intel/broadwell: Make `broadwell_init_pre_device` static

This small function is only used in one place.

Change-Id: Ieccdca60fb7837b6406a6b2fd7ebae86958a1afe
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49945
Reviewed-by: Arthur Heymans 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/broadwell/include/soc/ramstage.h
M src/soc/intel/broadwell/northbridge.c
M src/soc/intel/broadwell/ramstage.c
3 files changed, 5 insertions(+), 8 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/soc/intel/broadwell/include/soc/ramstage.h b/src/soc/intel/broadwell/include/soc/ramstage.h
index 4d057ac..3900c73 100644
--- a/src/soc/intel/broadwell/include/soc/ramstage.h
+++ b/src/soc/intel/broadwell/include/soc/ramstage.h
@@ -6,8 +6,6 @@
 #include <device/device.h>
 #include <soc/intel/broadwell/chip.h>

-void broadwell_init_pre_device(void *chip_info);
-
 #if CONFIG(HAVE_REFCODE_BLOB)
 void broadwell_run_reference_code(void);
 #else
diff --git a/src/soc/intel/broadwell/northbridge.c b/src/soc/intel/broadwell/northbridge.c
index 43fa081..bc26388 100644
--- a/src/soc/intel/broadwell/northbridge.c
+++ b/src/soc/intel/broadwell/northbridge.c
@@ -474,6 +474,11 @@
    }
 }

+static void broadwell_init_pre_device(void *chip_info)
+{
+	broadwell_run_reference_code();
+}
+
 struct chip_operations soc_intel_broadwell_ops = {
    CHIP_NAME("Intel Broadwell")
    .enable_dev = &broadwell_enable,
diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c
index 0078939..a75bd36 100644
--- a/src/soc/intel/broadwell/ramstage.c
+++ b/src/soc/intel/broadwell/ramstage.c
@@ -9,7 +9,6 @@
 #include <string.h>
 #include <soc/nvs.h>
 #include <soc/pm.h>
-#include <soc/ramstage.h>
 #include <soc/intel/broadwell/chip.h>

/* Save bit index for PM1_STS and GPE_STS for ACPI _SWS */
@@ -73,8 +72,3 @@
 }

BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
-
-void broadwell_init_pre_device(void *chip_info)
-{
-	broadwell_run_reference_code();
-}