[coreboot-gerrit] Change in coreboot[master]: Revert "google/cyan: Use GpioInt for Keyboard IRQ"

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/21209

Change subject: Revert "google/cyan: Use GpioInt for Keyboard IRQ"
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Revert "google/cyan: Use GpioInt for Keyboard IRQ"

This reverts commit 3d4f04f6b1c802c2c2126b6a6cc97fb5b49ec0bd.

The kernel-side changes needed to support this won't be merged
into the mailing kernel until 4.13 (currently in linux-next).

My previous testing was with a daily build of ChromiumOS which
already had the required kernel changes so I missed the breakage.

TEST: Boot cyan on mailine kernel 4.12.x (or earlier),
observe keyboard now functional again.

Change-Id: Idef57d1cc7cafaa15768c96febb8f9fd7a81c292
Signed-off-by: Matt DeVillier 
---
M src/mainboard/google/cyan/acpi/superio.asl
M src/mainboard/google/cyan/onboard.h
2 files changed, 9 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/21209/1

diff --git a/src/mainboard/google/cyan/acpi/superio.asl b/src/mainboard/google/cyan/acpi/superio.asl
index f2a7fc0..34ae348 100644
--- a/src/mainboard/google/cyan/acpi/superio.asl
+++ b/src/mainboard/google/cyan/acpi/superio.asl
@@ -23,8 +23,8 @@
 #define SIO_EC_ENABLE_PS2K       /* Enable PS/2 Keyboard */

/* Override default IRQ settings */
-#define SIO_EC_PS2K_IRQ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,\
-				 "\_SB.GPNC") { BOARD_I8042_GPIO_INDEX }
+#define SIO_EC_PS2K_IRQ Interrupt(ResourceConsumer, Edge, ActiveLow){\
+                                                     BOARD_I8042_IRQ}

/* ACPI code for EC SuperIO functions */
 #include <ec/google/chromeec/acpi/superio.asl>
diff --git a/src/mainboard/google/cyan/onboard.h b/src/mainboard/google/cyan/onboard.h
index c891aa8..706f306 100644
--- a/src/mainboard/google/cyan/onboard.h
+++ b/src/mainboard/google/cyan/onboard.h
@@ -30,10 +30,15 @@
  * GPSE_SIZE = 86
  */

+/*
+ * gpio based irq for kbd, 17th index in North Bank
+ * MAX_DIRECT_IRQ + GPSW_SIZE + 18
+ */
+/* ToDO: change kbd irq to gpio bank index */
+#define BOARD_I8042_IRQ			182
 #define BOARD_TOUCH_IRQ			184

-/* KBD: Gpio index in N bank */
-#define BOARD_I8042_GPIO_INDEX		17
+
 /* SCI: Gpio index in N bank */
 #define BOARD_SCI_GPIO_INDEX		15
 /* Trackpad: Gpio index in N bank */