Attention is currently required from: Arthur Heymans, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj.
Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84080?usp=email )
Change subject: soc/intel/adl: Prevent unconditional legacy COM ports initialization ......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84080/comment/25f2bdca_6ab169b0?usp... : PS1, Line 14: These COM ports are being activated unconditionally, which is : undesirable for the Intel Alder Lake platform and causes traffic over : the IO bus.
I don't understand this. What code is generating those writes?
sorry if things are not cleared. As we are not using Legacy UART for ChromeOS device but looking at the Alder Lake code, we found that Legacy COMs are default enabled and we have observed some activity across those ports. Hence, pushed this CL to ensure legacy COMs are not getting enabled when the desired kconfig are not being selected
File src/soc/intel/alderlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/84080/comment/a31a9292_6667e5ad?usp... : PS1, Line 101: LPC_IOE_LPT_EN | LPC_IOE_FDD_EN | : LPC_IOE_LGE_200 | LPC_IOE_HGE_208 |
Do you use a printer on the parallel port, a floppy disk drive, and a gaming port?
I believe this code still requires some additional cleaning, but I am not going to touch it because I am unsure of who the consumer of this code is. We have encountered an issue in which legacy COMs are enabled by default, which should only occur when DRIVERS_UART_8250IO is selected (not POR for CrOS). As a result, I simply removed those lines of code with the assumption that when someone selects DRIVERS_UART_8250IO, legacy COMs will be enabled.