[coreboot-gerrit] Change in coreboot[master]: cpu/x86/mp.h: Implement a pre-SSE2 mfence

[Arthur Heymans (Code Review)]

Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59766 )

Change subject: cpu/x86/mp.h: Implement a pre-SSE2 mfence
......................................................................

cpu/x86/mp.h: Implement a pre-SSE2 mfence

Taken from the Linux Kernel.

Tested: Qemu using '-cpu pentium3' now boots.

Change-Id: I376f86f4d7992344dd68374ba67ad3580070f4d8
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59766
Tested-by: build bot (Jenkins) 
Reviewed-by: Kyösti Mälkki 
---
M src/include/cpu/x86/mp.h
1 file changed, 5 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Kyösti Mälkki: Looks good to me, approved

diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index 8105477..aea3ca1 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -13,7 +13,11 @@

static inline void mfence(void)
 {
-	__asm__ __volatile__("mfence\t\n": : :"memory");
+	/* mfence came with the introduction of SSE2. */
+	if (CONFIG(SSE2))
+		__asm__ __volatile__("mfence\t\n": : :"memory");
+	else
+		__asm__ __volatile__("lock; addl $0,0(%%esp)": : : "memory");
 }

/* The sequence of the callbacks are in calling order. */