Jett Rink has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31682
Change subject: driver/intel/ish: add ish chip driver support ......................................................................
driver/intel/ish: add ish chip driver support
We want to be able to specify the firmware variant suffix in the devicetree.cb configuration for particular firmware builds. This driver allows us to specify the firmware_variant property in the device tree and have it populate a _DST table in the DDST ACPI table for the ISH device, thus making the suffix available to the kernel.
BRANCH=none BUG=b:122722008 TEST=decompile DDST table and verify that new firmware-variant value is present. Also verfied that kernel can access this new field using the shim loader kernel CLs
Change-Id: Id8be986185282521aee574027503eaf8968e1508 Signed-off-by: Jett Rink jettrink@chromium.org --- A src/drivers/intel/ish/Kconfig A src/drivers/intel/ish/Makefile.inc A src/drivers/intel/ish/chip.h A src/drivers/intel/ish/ish.c M src/include/device/pci_ids.h 5 files changed, 129 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/31682/1
diff --git a/src/drivers/intel/ish/Kconfig b/src/drivers/intel/ish/Kconfig new file mode 100644 index 0000000..b4c92ef --- /dev/null +++ b/src/drivers/intel/ish/Kconfig @@ -0,0 +1,6 @@ +config DRIVERS_INTEL_ISH + bool "Support Intel ISH driver that publishes _DSD information" + depends on ARCH_X86 + help + When enabled, chip driver/intel/ish will publish information to the + SSDT _DSD table for the ISH device. \ No newline at end of file diff --git a/src/drivers/intel/ish/Makefile.inc b/src/drivers/intel/ish/Makefile.inc new file mode 100644 index 0000000..cab2b1d8 --- /dev/null +++ b/src/drivers/intel/ish/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_INTEL_ISH) += ish.c diff --git a/src/drivers/intel/ish/chip.h b/src/drivers/intel/ish/chip.h new file mode 100644 index 0000000..426e6bf --- /dev/null +++ b/src/drivers/intel/ish/chip.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi_device.h> + +/* + * Intel Integrated Sensor Hub (ISH) + */ +struct drivers_intel_ish_config { + /* Firmware variant suffix used by kernel for loading */ + const char *firmware_variant; +}; diff --git a/src/drivers/intel/ish/ish.c b/src/drivers/intel/ish/ish.c new file mode 100644 index 0000000..963eb05 --- /dev/null +++ b/src/drivers/intel/ish/ish.c @@ -0,0 +1,97 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi_device.h> +#include <arch/acpigen.h> +#include <console/console.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include "chip.h" + +static void ish_fill_ssdt_generator(struct device *dev) +{ + struct drivers_intel_ish_config *config = dev->chip_info; + struct device *root = dev->bus->dev; + struct acpi_dp *dsd; + + if (!dev->enabled || !config || !config->firmware_variant) + return; + + acpigen_write_scope(acpi_device_scope(root)); + acpigen_write_device(acpi_device_name(root)); + + dsd = acpi_dp_new_table("_DSD"); + acpi_dp_add_string(dsd, "firmware-variant", config->firmware_variant); + acpi_dp_write(dsd); + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ + + printk(BIOS_INFO, "%s: Set firmware-variant: %s\n", + acpi_device_path(root), config->firmware_variant); +} + +static struct device_operations intel_ish_ops = { + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .acpi_fill_ssdt_generator = ish_fill_ssdt_generator, +}; + +static void intel_ish_enable(struct device *dev) +{ + /* This dev is a generic device that is a child to the ISH PCI device */ + dev->ops = &intel_ish_ops; +} + +static struct pci_driver ish_intel_driver __pci_driver = { + .vendor = PCI_VENDOR_ID_INTEL, + /* .devices and .ops are during chip init if needed */ +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_ISHB, + 0 +}; + +static void ish_chip_init_update_pci_driver(void *unused) +{ + static struct device_operations pci_ish_device_ops; + + /* + * We know this chip driver is in use, so we need to enable the PCI + * driver to use the default pci ops with the addition of generic scan + * bus. We also make the PCI driver match the ISH PIDs. + * + * If this method is not called (i.e. the Intel ISH chip is not in use), + * then the PCI driver will not match anything on the system. + */ + + /* Use the default pci ops for ISH */ + memcpy(&pci_ish_device_ops, &default_pci_ops_dev, + sizeof(pci_ish_device_ops)); + /* Add generic bus scan */ + pci_ish_device_ops.scan_bus = &scan_generic_bus; + + /* Set new ops and enable PCI driver by setting device IDs */ + ish_intel_driver.ops = &pci_ish_device_ops; + ish_intel_driver.devices = pci_device_ids; +} + +struct chip_operations drivers_intel_ish_ops = { + CHIP_NAME("Intel ISH Chip") + .init = ish_chip_init_update_pci_driver, + .enable_dev = intel_ish_enable, +}; diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 90b02cb..dc5e6a8 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2091,6 +2091,7 @@ #define PCI_DEVICE_ID_INTEL_80960_RP 0x1960 #define PCI_DEVICE_ID_INTEL_82437VX 0x7030 #define PCI_DEVICE_ID_INTEL_82439TX 0x7100 +#define PCI_DEVICE_ID_INTEL_ISHB 0x9dfc
/* Intel 82371FB (PIIX) */ #define PCI_DEVICE_ID_INTEL_82371FB_ISA 0x122e