Ian Feng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60093 )
Change subject: mb/google/dedede: Create corori2 variant ......................................................................
mb/google/dedede: Create corori2 variant
Create the corori2 variant of the waddledoo reference board by copying the template files to a new directory named for the variant.
(Auto-Generated by create_coreboot_variant.sh version 4.5.0).
BUG=b:209892078 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_CORORI2
Signed-off-by: Ian Feng ian_feng@compal.corp-partner.google.com Change-Id: I7bf437aa9ef70e4a470ab9727ee076c251433e01 --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Kconfig.name A src/mainboard/google/dedede/variants/corori2/Makefile.inc A src/mainboard/google/dedede/variants/corori2/gpio.c A src/mainboard/google/dedede/variants/corori2/include/variant/ec.h A src/mainboard/google/dedede/variants/corori2/include/variant/gpio.h A src/mainboard/google/dedede/variants/corori2/memory/Makefile.inc A src/mainboard/google/dedede/variants/corori2/memory/dram_id.generated.txt A src/mainboard/google/dedede/variants/corori2/memory/mem_parts_used.txt A src/mainboard/google/dedede/variants/corori2/overridetree.cb 10 files changed, 263 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/60093/1
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 29a9481..31ac491 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -112,6 +112,7 @@ default "Driblee" if BOARD_GOOGLE_DRIBLEE default "Gooey" if BOARD_GOOGLE_GOOEY default "Beadrix" if BOARD_GOOGLE_BEADRIX + default "Corori2" if BOARD_GOOGLE_CORORI2
config MAX_CPUS int @@ -150,6 +151,7 @@ default "driblee" if BOARD_GOOGLE_DRIBLEE default "gooey" if BOARD_GOOGLE_GOOEY default "beadrix" if BOARD_GOOGLE_BEADRIX + default "corori2" if BOARD_GOOGLE_CORORI2
endif #BOARD_GOOGLE_BASEBOARD_DEDEDE
diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index 212f242..7e9ffcf 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -175,3 +175,9 @@ bool "-> Beadrix" select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 select BASEBOARD_DEDEDE_LAPTOP + +config BOARD_GOOGLE_CORORI2 + bool "-> Corori2" + select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 + select BASEBOARD_DEDEDE_LAPTOP + select DRIVERS_GENERIC_MAX98357A diff --git a/src/mainboard/google/dedede/variants/corori2/Makefile.inc b/src/mainboard/google/dedede/variants/corori2/Makefile.inc new file mode 100644 index 0000000..eb2c9bc --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/Makefile.inc @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +ramstage-y += gpio.c diff --git a/src/mainboard/google/dedede/variants/corori2/gpio.c b/src/mainboard/google/dedede/variants/corori2/gpio.c new file mode 100644 index 0000000..2a615a07d --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/gpio.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> + +/* Pad configuration in ramstage */ +static const struct pad_config override_gpio_table[] = { + /* A11 : TOUCH_RPT_EN ==> NC */ + PAD_NC(GPP_A11, NONE), + /* C12 : AP_PEN_DET_ODL ==> NC */ + PAD_NC(GPP_C12, UP_20K), + /* C18 : AP_I2C_EMR_SDA */ + PAD_NC(GPP_C18, NONE), + /* C19 : AP_I2C_EMR_SCL */ + PAD_NC(GPP_C19, NONE), + /* C22 : UART2_RTS_N ==> NC */ + PAD_NC(GPP_C22, UP_20K), + /* D4 : TOUCH_INT_ODL ==> NC */ + PAD_NC(GPP_D4, NONE), + /* D5 : TOUCH_RESET_L ==> NC */ + PAD_NC(GPP_D5, NONE), + /* D6 : EN_PP3300_TOUCH_S0 ==> NC */ + PAD_NC(GPP_D6, NONE), + /* D12 : WCAM_RST_L ==> NC */ + PAD_NC(GPP_D12, NONE), + /* D14 : EN_PP1200_CAMERA ==> NC */ + PAD_NC(GPP_D14, NONE), + /* D15 : UCAM_RST_L ==> NC */ + PAD_NC(GPP_D15, NONE), + /* D19 : WWAN_WLAN_COEX1 ==> NC */ + PAD_NC(GPP_D19, NONE), + /* D20 : WWAN_WLAN_COEX2 ==> NC */ + PAD_NC(GPP_D20, NONE), + /* D21 : WWAN_WLAN_COEX3 ==> NC */ + PAD_NC(GPP_D21, NONE), + /* E0 : CLK_24M_UCAM ==> NC */ + PAD_NC(GPP_E0, NONE), + /* E2 : CLK_24M_WCAM ==> NC */ + PAD_NC(GPP_E2, NONE), + /* H1 : EN_PP3300_SD_U ==> NC */ + PAD_NC(GPP_H1, NONE), + /* H4 : AP_I2C_TS_SDA ==> NC */ + PAD_NC(GPP_H4, NONE), + /* H5 : AP_I2C_TS_SCL ==> NC */ + PAD_NC(GPP_H5, NONE), + /* H6 : AP_I2C_CAM_SDA ==> NC */ + PAD_NC(GPP_H6, NONE), + /* H7 : AP_I2C_CAM_SCL ==> NC */ + PAD_NC(GPP_H7, NONE), + /* G0 : SD_CMD ==> NC */ + PAD_NC(GPP_G0, NONE), + /* G1 : SD_DATA0 ==> NC */ + PAD_NC(GPP_G1, NONE), + /* G2 : SD_DATA1 ==> NC */ + PAD_NC(GPP_G2, NONE), + /* G3 : SD_DATA2 ==> NC */ + PAD_NC(GPP_G3, NONE), + /* G4 : SD_DATA3 ==> NC */ + PAD_NC(GPP_G4, NONE), + /* G5 : SD_CD_ODL ==> NC */ + PAD_NC(GPP_G5, UP_20K), + /* G6 : SD_CLK ==> NC */ + PAD_NC(GPP_G6, NONE), + /* G7 : SD_SDIO_WP ==> NC */ + PAD_NC(GPP_G7, NONE), +}; + +const struct pad_config *variant_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(override_gpio_table); + return override_gpio_table; +} diff --git a/src/mainboard/google/dedede/variants/corori2/include/variant/ec.h b/src/mainboard/google/dedede/variants/corori2/include/variant/ec.h new file mode 100644 index 0000000..08870e0 --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/dedede/variants/corori2/include/variant/gpio.h b/src/mainboard/google/dedede/variants/corori2/include/variant/gpio.h new file mode 100644 index 0000000..9078664 --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/dedede/variants/corori2/memory/Makefile.inc b/src/mainboard/google/dedede/variants/corori2/memory/Makefile.inc new file mode 100644 index 0000000..7758964 --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/memory/Makefile.inc @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/corori2/memory src/mainboard/google/dedede/variants/corori2/memory/mem_parts_used.txt + +SPD_SOURCES = +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR diff --git a/src/mainboard/google/dedede/variants/corori2/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/corori2/memory/dram_id.generated.txt new file mode 100644 index 0000000..580dd1c --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/memory/dram_id.generated.txt @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/corori2/memory src/mainboard/google/dedede/variants/corori2/memory/mem_parts_used.txt + +DRAM Part Name ID to assign +H9HCNNNBKMMLXR-NEE 0 (0000) +K4U6E3S4AA-MGCR 0 (0000) diff --git a/src/mainboard/google/dedede/variants/corori2/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/corori2/memory/mem_parts_used.txt new file mode 100644 index 0000000..ae86d68 --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/memory/mem_parts_used.txt @@ -0,0 +1,2 @@ +H9HCNNNBKMMLXR-NEE +K4U6E3S4AA-MGCR diff --git a/src/mainboard/google/dedede/variants/corori2/overridetree.cb b/src/mainboard/google/dedede/variants/corori2/overridetree.cb new file mode 100644 index 0000000..71440ab --- /dev/null +++ b/src/mainboard/google/dedede/variants/corori2/overridetree.cb @@ -0,0 +1,147 @@ +chip soc/intel/jasperlake + + # USB Port Configuration + register "usb2_ports[1]" = "USB2_PORT_EMPTY" # None + register "usb2_ports[3]" = "USB2_PORT_EMPTY" # None + register "usb2_ports[4]" = "USB2_PORT_EMPTY" # None + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera (UFC) + register "usb2_ports[6]" = "USB2_PORT_EMPTY" # None + register "usb3_ports[1]" = "USB3_PORT_EMPTY" # None + register "usb3_ports[3]" = "USB3_PORT_EMPTY" # None + + register "SerialIoI2cMode" = "{ + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoDisabled, + [PchSerialIoIndexI2C2] = PchSerialIoDisabled, + [PchSerialIoIndexI2C3] = PchSerialIoDisabled, + [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoDisabled, + }" + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #| I2C0 | Trackpad | + #| I2C1 | | + #| I2C2 | | + #| I2C3 | | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + .i2c[0] = { + .rise_time_ns = 255, + .fall_time_ns = 14, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + } + }, + }" + device domain 0 on + device pci 04.0 on + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000) + }" + + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN) + }" + + ## Power Limits Control + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 3000, + .max_power = 6000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 200, + }, + .pl2 = { + .min_power = 20000, + .max_power = 20000, + .time_window_min = 1 * MSECS_PER_SEC, + .time_window_max = 1 * MSECS_PER_SEC, + .granularity = 1000, + } + }" + device generic 0 on end + end + end # SA Thermal device + device pci 14.0 on + chip drivers/usb/acpi + device usb 0.0 on + chip drivers/usb/acpi + device usb 2.1 off end + end + chip drivers/usb/acpi + device usb 2.3 off end + end + chip drivers/usb/acpi + register "desc" = ""Camera (UFC)"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.5 on end + end + chip drivers/usb/acpi + device usb 3.1 off end + end + chip drivers/usb/acpi + device usb 3.3 off end + end + end + end + end # USB xHCI + device pci 15.0 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_B3_IRQ)" + register "wake" = "GPE0_DW0_03" + register "probed" = "1" + device i2c 15 on end + end + end #I2C 0 + device pci 15.1 off end # I2C 1 + device pci 15.2 off end # I2C 2 + device pci 15.3 off end # I2C 3 + device pci 1c.7 on end + device pci 19.0 on + chip drivers/i2c/generic + register "hid" = ""RTL5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" + # Set the jd_src to RT5668_JD1 for jack detection + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on end + end + end #I2C 4 + device pci 1f.3 on + chip drivers/generic/max98357a + register "hid" = ""MX98360A"" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)" + device generic 0 on end + end + end # Intel HDA + end +end