Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32734 )
Change subject: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF ......................................................................
Patch Set 68:
(4 comments)
https://review.coreboot.org/c/coreboot/+/32734/68//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/32734/68//COMMIT_MSG@15 PS68, Line 15: PCIe Does PEG work with Gen3?
https://review.coreboot.org/c/coreboot/+/32734/68/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/32734/68/src/mainboard/supermicro/x... PS68, Line 209: device pci 01.0 on end # PCI Slot Is this M.2 Interface or PEGx8 slot[1]? Please add more information to the comment. Does it work on Gen3? [1]https://www.supermicro.com/en/products/motherboard/X11SSH-TF
Need to limit link width for FSP: register "Peg0MaxLinkWidth" = "Peg0_x8" if PEGx8 slot register "Peg0MaxLinkWidth" = "Peg0_x4" if M.2
What about the SRCCLKREQ and CLKSRC?
https://review.coreboot.org/c/coreboot/+/32734/68/src/mainboard/supermicro/x... PS68, Line 210: device pci 01.1 on register "Peg1MaxLinkWidth" = "Peg1_x8" if PEGx8 slot register "Peg1MaxLinkWidth" = "Peg1_x4" if M.2
What about the SRCCLKREQ and CLKSRC for peg1?
https://review.coreboot.org/c/coreboot/+/32734/68/src/mainboard/supermicro/x... PS68, Line 211: 4X X4 or X8???