[coreboot-gerrit] [S] Change in coreboot[main]: mb/google/brox: Do not override GPIO PM

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83856?usp=email )

Change subject: mb/google/brox: Do not override GPIO PM
......................................................................

mb/google/brox: Do not override GPIO PM

Brox uses Ti50 which always supports long interrupt pulse. Hence no need
to override GPIO PM.

BUG=None
TEST=Build Brox firmware and boot to OS. Perform suspend/resume for 25
cycles.

Change-Id: I6a138c1953714bc29570db587594cab8f315a4ec
Signed-off-by: Karthikeyan Ramasubramanian 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83856
Reviewed-by: Subrata Banik 
Reviewed-by: Nick Vaccaro 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/brox/mainboard.c
1 file changed, 0 insertions(+), 25 deletions(-)

Approvals:
  Subrata Banik: Looks good to me, approved
  Nick Vaccaro: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/brox/mainboard.c b/src/mainboard/google/brox/mainboard.c
index 9285ae2..c21a313 100644
--- a/src/mainboard/google/brox/mainboard.c
+++ b/src/mainboard/google/brox/mainboard.c
@@ -4,11 +4,9 @@
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <device/device.h>
-#include <drivers/tpm/cr50.h>
 #include <drivers/wwan/fm/chip.h>
 #include <ec/ec.h>
 #include <fw_config.h>
-#include <security/tpm/tss.h>
 #include <soc/gpio.h>
 #include <soc/ramstage.h>
 #include <stdio.h>
@@ -34,29 +32,6 @@

void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 {
-	int ret;
-
-	ret = tlcl_lib_init();
-	if (ret != VB2_SUCCESS) {
-		printk(BIOS_ERR, "tlcl_lib_init() failed: 0x%x\n", ret);
-		return;
-	}
-
-	if (cr50_is_long_interrupt_pulse_enabled()) {
-		printk(BIOS_INFO, "Enabling GPIO PM b/c CR50 has long IRQ pulse support\n");
-		config->gpio_override_pm = 0;
-	} else {
-		printk(BIOS_INFO, "Disabling GPIO PM b/c CR50 does not have long IRQ pulse "
-		       "support\n");
-		config->gpio_override_pm = 1;
-		config->gpio_pm[COMM_0] = 0;
-		config->gpio_pm[COMM_1] = 0;
-		config->gpio_pm[COMM_2] = 0;
-		config->gpio_pm[COMM_3] = 0;
-		config->gpio_pm[COMM_4] = 0;
-		config->gpio_pm[COMM_5] = 0;
-	}
-
    variant_update_soc_chip_config(config);
 }