Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56885 )
Change subject: mb/(amd,google): Update SPI Kconfig settings based on devicetree ......................................................................
mb/(amd,google): Update SPI Kconfig settings based on devicetree
This takes the devicetree SPI settings and moves them into Kconfig.
BUG=b:195943311 TEST=None yet.
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Icce1d57761465ae8255e5d9ce8679f3fdcb0ceed --- M src/mainboard/amd/bilby/Kconfig M src/mainboard/amd/mandolin/Kconfig M src/mainboard/google/zork/Kconfig 3 files changed, 43 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/56885/1
diff --git a/src/mainboard/amd/bilby/Kconfig b/src/mainboard/amd/bilby/Kconfig index daa6b6e..34c7f90 100644 --- a/src/mainboard/amd/bilby/Kconfig +++ b/src/mainboard/amd/bilby/Kconfig @@ -92,20 +92,27 @@ string default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin"
+if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig config EFS_SPI_READ_MODE - int - default 0 if EM100 - default 3 + default 3 # Quad IO (1-1-4)
config EFS_SPI_SPEED - int - default 3 if EM100 - default 0 + default 0 # 66MHz
config EFS_SPI_MICRON_FLAG - int default 0
+config NORMAL_READ_SPI_SPEED + default 1 # 33MHz + +config ALT_SPI_SPEED + default 1 # 33MHz + +config TPM_SPI_SPEED + default 1 # 33MHz + +endif # !EM100 + choice prompt "DDI-0 connector type" default CONNECT_DP_ON_DDI_0 diff --git a/src/mainboard/amd/mandolin/Kconfig b/src/mainboard/amd/mandolin/Kconfig index 9d545b8..50b3e5d 100644 --- a/src/mainboard/amd/mandolin/Kconfig +++ b/src/mainboard/amd/mandolin/Kconfig @@ -124,20 +124,25 @@ default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin" if BOARD_AMD_MANDOLIN default "3rdparty/amd_blobs/picasso/Raven2GenericVbios.bin" if BOARD_AMD_CEREME
+if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig config EFS_SPI_READ_MODE - int - default 0 if EM100 - default 0 if BOARD_AMD_CEREME - default 3 + default 3 # Quad IO (1-1-4)
config EFS_SPI_SPEED - int - default 3 if EM100 - default 1 if BOARD_AMD_CEREME - default 0 + default 0 # 66MHz
config EFS_SPI_MICRON_FLAG - int default 0
+config NORMAL_READ_SPI_SPEED + default 1 # 33MHz + +config ALT_SPI_SPEED + default 1 # 33MHz + +config TPM_SPI_SPEED + default 1 # 33MHz + +endif # !EM100 + endif # BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index e93516e..88544e0 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -245,20 +245,28 @@ help Last board version that needs the extra delay for FPMCU init.
+if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig config EFS_SPI_READ_MODE - int - default 0 if EM100 # Normal read mode - default 2 # Dual IO (1-1-2) + default 4 # Dual IO (1-2-2)
config EFS_SPI_SPEED - int - default 3 if EM100 # 16.66 MHz - default 0 # 66.66 MHz + default 0 # 66MHz
config EFS_SPI_MICRON_FLAG - int default 0
+config NORMAL_READ_SPI_SPEED + default 1 # 33MHz + +config ALT_SPI_SPEED + default 0 # 66MHz + +config TPM_SPI_SPEED + default 0 # 66MHz + +endif # !EM100 + + config CHROMEOS_WIFI_SAR bool default y if CHROMEOS