[coreboot-gerrit] Change in coreboot[master]: security/intel/txt: Fix GETSEC checks in romstage

[Angel Pons (Code Review)]

Attention is currently required from: Michał Żygowski.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59520 )

Change subject: security/intel/txt: Fix GETSEC checks in romstage
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/59520/comment/4ba0b4e7_b2cdc9a1 
PS3, Line 11: Also noticed that the lock bit
            : of IA32_FEATURE_CONTROL cannot be cleared by issuing neither global
            : reset nor full reset on Sandybridge/Ivybridge platforms which results
            : in a reset loop.
Huh, this is very unusual. SNB BWG says the MSR is locked "until an S5 reset occurs".