[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Correct PMC/GPIO routing information

[Lijian Zhao (Code Review)]

Hello Nick Vaccaro, Caveh Jalali, Bora Guvendik, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/22908

to look at the new patch set (#3).

Change subject: soc/intel/cannonlake: Correct PMC/GPIO routing information
......................................................................

soc/intel/cannonlake: Correct PMC/GPIO routing information

PMC and GPIO DWx definition is not identical, hence update that to
correct information. For cannonlake lp PCH, GPIO group C, group E and
group GPD is different for PMC GPIO_CFG and GPIO MISCCFG.

TEST=Boot up into OS, and manually check PMC GPE status

Change-Id: I1edb83edabc72e8a762b129cf51dcd936cd37ddf
Signed-off-by: Lijian Zhao 
---
M src/soc/intel/cannonlake/bootblock/pch.c
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/gpio.c
M src/soc/intel/cannonlake/include/soc/pmc.h
4 files changed, 25 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/22908/3