Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44169 )
Change subject: mb/google/volteer/halvor: Enable cardreader function on Halvor ......................................................................
mb/google/volteer/halvor: Enable cardreader function on Halvor
Configure gpio settings for enabling cardreader function.
BUG=b:153680359 TEST=FW_NAME=halvor emerge-volteer coreboot chromeos-bootimage Verify that the sd card is mount on /dev/mmcblk0 successfully.
Signed-off-by: Frank Wu frank_wu@compal.corp-partner.google.com Change-Id: I51752f47bc8d31d3a11da728ce00ca754381fde9 --- M src/mainboard/google/volteer/variants/halvor/gpio.c 1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/44169/1
diff --git a/src/mainboard/google/volteer/variants/halvor/gpio.c b/src/mainboard/google/volteer/variants/halvor/gpio.c index 2a98688..50506d0 100644 --- a/src/mainboard/google/volteer/variants/halvor/gpio.c +++ b/src/mainboard/google/volteer/variants/halvor/gpio.c @@ -56,6 +56,8 @@
/* D7 : SRCCLKREQ2# ==> NC */ PAD_NC(GPP_D7, NONE), + /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ + PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* D9 : ISH_SPI_CS# ==> TBT_LSX2_TXD */ PAD_CFG_NF(GPP_D9, NONE, DEEP, NF4), /* D10 : ISH_SPI_CLK ==> TBT_LSX2_RXD */ @@ -64,6 +66,8 @@ PAD_NC(GPP_D11, NONE), /* D12 : ISH_SPI_MOSI ==> NC */ PAD_NC(GPP_D12, NONE), + /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP),
/* E0 : SATAXPCIE0 ==> NC */ PAD_NC(GPP_E0, NONE), @@ -75,6 +79,8 @@ PAD_NC(GPP_E5, NONE), /* E10 : SPI1_CS# ==> NC */ PAD_NC(GPP_E10, NONE), + /* E11 : SPI1_CLK ==> SD_PE_WAKE_ODL */ + PAD_CFG_GPI(GPP_E11, NONE, DEEP), /* E12 : SPI1_MISO_IO1 ==> NC */ PAD_NC(GPP_E12, NONE), /* E13 : SPI1_MOSI_IO0 ==> NC */ @@ -109,6 +115,8 @@ /* F19 : SRCCLKREQ6# ==> NC */ PAD_NC(GPP_F19, NONE),
+ /* H3 : SX_EXIT_HOLDOFF# ==> SD_PERST_L */ + PAD_CFG_GPO(GPP_H3, 1, DEEP), /* H6 : I2C3_SDA */ PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), /* H7 : I2C3_SCL */ @@ -184,6 +192,9 @@ /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ PAD_CFG_GPO(GPP_C22, 0, DEEP),
+ /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), + /* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */ PAD_CFG_GPO(GPP_H11, 1, DEEP), };