[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/common: Add whiskeylake celeron v-0 support

[Lijian Zhao (Code Review)]

Hello Patrick Rudolph, Lean Sheng Tan, Paul Menzel, Bora Guvendik, build bot (Jenkins), Krzysztof M Sywula,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31433

to look at the new patch set (#3).

Change subject: soc/intel/common: Add whiskeylake celeron v-0 support
......................................................................

soc/intel/common: Add whiskeylake celeron v-0 support

New whiskeylake v-0 stepping have changed the graphics device id from
0x3EA0 to 0x3EA1 for celeron, so declare that in common code. Also the
CPUID had been changed from 806EB to 806EC, include that as well.

Signed-off-by: Lijian Zhao 
Change-Id: Ief5213a96507124b90f8dd2eeea2f6bf43843dc6
---
M src/include/device/pci_ids.h
M src/soc/intel/cannonlake/bootblock/report_platform.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/graphics/graphics.c
M src/soc/intel/common/block/include/intelblocks/mp_init.h
5 files changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/31433/3