29 May
2020
29 May
'20
9:18 p.m.
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41049 )
Change subject: nb/intel/i440bx: Refactor ACPI code ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b... File src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl:
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b... PS3, Line 62: ShiftLeft(0x10000000, 4, Local0)
I think this is intentional. […]
I know that bit shift math is intentional, and yes because it's 32-bit.
Now I've confirmed the resource data returned is correct. I'll correct this in the next patch set.
--
To view, visit https://review.coreboot.org/c/coreboot/+/41049
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2c74ef30a9bb48e02154f963b1ca3a4f5f3004df
Gerrit-Change-Number: 41049
Gerrit-PatchSet: 5
Gerrit-Owner: Keith Hui buurin@gmail.com
Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Sat, 30 May 2020 04:18:41 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com
Comment-In-Reply-To: Keith Hui buurin@gmail.com
Gerrit-MessageType: comment