Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83699?usp=email )
Change subject: soc/amd/common/psp_smm: add comments to psp_notify_smm ......................................................................
soc/amd/common/psp_smm: add comments to psp_notify_smm
The reasoning behind this and the positive side effects of this aren't too clear from the code, so point those out in a comment.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I4f4121031fc1ef600cdf5551f61f1ef4e03b56a5 --- M src/soc/amd/common/block/psp/psp_smm.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/83699/1
diff --git a/src/soc/amd/common/block/psp/psp_smm.c b/src/soc/amd/common/block/psp/psp_smm.c index 114cf12..9b130b6 100644 --- a/src/soc/amd/common/block/psp/psp_smm.c +++ b/src/soc/amd/common/block/psp/psp_smm.c @@ -47,6 +47,13 @@ smm_flag = 0; }
+/* + * The MBOX_BIOS_CMD_SMM_INFO PSP mailbox command doesn't necessarily need be sent from SMM, + * but doing so allows the linker to sort out the addresses of c2p_buffer, p2c_buffer and + * smm_flag without us needing to pass this info between ramstage and smm. In the PSP gen2 case + * this will also make sure that that PSP MMIO base will be cached in SMM before the OS takes + * over so no SMN accesses will be needed during OS runtime. + */ int psp_notify_smm(void) { msr_t msr;