Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Felix Held, Hannah Williams, Jamie Ryu, Paul Menzel.
Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )
Change subject: soc/intel/common/block/pmc: Add GPE1 functions
......................................................................
Patch Set 27:
(3 comments)
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/84104/comment/37fffe2d_7226df40?usp... :
PS27, Line 235: const char *const *soc_std_gpe1_sts_array(int idx, size_t *a);
u can also move this inside `#if` and keep a inline `NULL` API when `!SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1`
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/84104/comment/083a9071_9b60cb05?usp... :
PS11, Line 241: gpe0_mask
sure. on my list.
Acknowledged
File src/soc/intel/common/block/pmc/pmclib.c:
https://review.coreboot.org/c/coreboot/+/84104/comment/3b71675c_9b23b5a8?usp... :
PS24, Line 421: print_std_gpe1_sts(gpe1_sts);
Similar to GPE0 in line 415, the STS values are read and saved prior to the reset. […]
Acknowledged
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