HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16629
-gerrit
commit 323532a874c87ca34be4f3ef65ac3d1339c0db6c Author: Elyes HAOUAS ehaouas@noos.fr Date: Sat Sep 17 20:40:04 2016 +0200
northbridge/intel/gm45: Add space around operators
Change-Id: I3781c36a3f354bfd54d20488b95d4f2307c3bce2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/northbridge/intel/gm45/northbridge.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index ce75aea..5ae0dbc 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -153,14 +153,14 @@ static void mch_domain_read_resources(device_t dev) (touud >> 10) - 4096); }
- printk(BIOS_DEBUG, "Adding UMA memory area base=0x%llx " - "size=0x%llx\n", ((u64)tomk) << 10, ((u64)uma_sizek) << 10); + printk(BIOS_DEBUG, "Adding UMA memory area base = 0x%llx " + "size = 0x%llx\n", ((u64)tomk) << 10, ((u64)uma_sizek) << 10); /* Don't use uma_resource() as our UMA touches the PCI hole. */ fixed_mem_resource(dev, 6, tomk, uma_sizek, IORESOURCE_RESERVE);
if (decode_pcie_bar(&pcie_config_base, &pcie_config_size)) { - printk(BIOS_DEBUG, "Adding PCIe config bar base=0x%08x " - "size=0x%x\n", pcie_config_base, pcie_config_size); + printk(BIOS_DEBUG, "Adding PCIe config bar base = 0x%08x " + "size = 0x%x\n", pcie_config_base, pcie_config_size); fixed_mem_resource(dev, 7, pcie_config_base >> 10, pcie_config_size >> 10, IORESOURCE_RESERVE); } @@ -226,15 +226,15 @@ static void enable_dev(device_t dev) switch (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), /*D0F0_SKPD*/0xdc)) { case SKPAD_NORMAL_BOOT_MAGIC: printk(BIOS_DEBUG, "Normal boot.\n"); - acpi_slp_type=0; + acpi_slp_type = 0; break; case SKPAD_ACPI_S3_MAGIC: printk(BIOS_DEBUG, "S3 Resume.\n"); - acpi_slp_type=3; + acpi_slp_type = 3; break; default: printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); - acpi_slp_type=0; + acpi_slp_type = 0; break; } #endif