Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9484
-gerrit
commit 30612c4975bc244461bd86aa6b001e881aa2b5f5 Author: Duncan Laurie dlaurie@chromium.org Date: Tue Jan 6 13:32:42 2015 -0800
broadwell: Update SATA Gen3 TX adjustment registers
The registers that were used here are for CPT/PPT and not for HSW/BDW chips.
Update this to update just the Gen3 TX Output Voltage Downscale Amplitude Adjustment field in the SATA ECR T88.
BUG=chrome-os-partner:28234 BRANCH=samus,auron TEST=build and boot on samus
Change-Id: I94b702dc4a3c98678ba048ff9cfa4a85cc5b1eed Signed-off-by: Stefan Reinauer reinauer@chromium.org Original-Commit-Id: 4c5816cc647b84266751e8a591eb85d7735fee12 Original-Change-Id: I98ec9678938a6675828721d5b57683077f555d21 Original-Signed-off-by: Duncan Laurie dlaurie@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/238800 Original-Reviewed-by: Shawn Nematbakhsh shawnn@chromium.org --- src/soc/intel/broadwell/include/soc/sata.h | 8 ++++++-- src/soc/intel/broadwell/sata.c | 16 ++++++++++++---- 2 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/src/soc/intel/broadwell/include/soc/sata.h b/src/soc/intel/broadwell/include/soc/sata.h index 357fe58..73e7b31 100644 --- a/src/soc/intel/broadwell/include/soc/sata.h +++ b/src/soc/intel/broadwell/include/soc/sata.h @@ -25,8 +25,12 @@ #define SATA_SP 0xd0 /* Scratchpad */
/* SATA IOBP Registers */ -#define SATA_IOBP_SP0G3IR 0xea000151 -#define SATA_IOBP_SP1G3IR 0xea000051 +#define SATA_IOBP_SP0_SECRT88 0xea002688 +#define SATA_IOBP_SP1_SECRT88 0xea002488 + +#define SATA_SECRT88_VADJ_MASK 0xff +#define SATA_SECRT88_VADJ_SHIFT 16 + #define SATA_IOBP_SP0DTLE_DATA 0xea002550 #define SATA_IOBP_SP0DTLE_EDGE 0xea002554 #define SATA_IOBP_SP1DTLE_DATA 0xea002750 diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c index a41e900..d3cf525 100644 --- a/src/soc/intel/broadwell/sata.c +++ b/src/soc/intel/broadwell/sata.c @@ -138,12 +138,20 @@ static void sata_init(struct device *dev)
/* Set Gen3 Transmitter settings if needed */ if (config->sata_port0_gen3_tx) - pch_iobp_update(SATA_IOBP_SP0G3IR, 0, - config->sata_port0_gen3_tx); + pch_iobp_update(SATA_IOBP_SP0_SECRT88, + ~(SATA_SECRT88_VADJ_MASK << + SATA_SECRT88_VADJ_SHIFT), + (config->sata_port0_gen3_tx & + SATA_SECRT88_VADJ_MASK) + << SATA_SECRT88_VADJ_SHIFT);
if (config->sata_port1_gen3_tx) - pch_iobp_update(SATA_IOBP_SP1G3IR, 0, - config->sata_port1_gen3_tx); + pch_iobp_update(SATA_IOBP_SP1_SECRT88, + ~(SATA_SECRT88_VADJ_MASK << + SATA_SECRT88_VADJ_SHIFT), + (config->sata_port1_gen3_tx & + SATA_SECRT88_VADJ_MASK) + << SATA_SECRT88_VADJ_SHIFT);
/* Set Gen3 DTLE DATA / EDGE registers if needed */ if (config->sata_port0_gen3_dtle) {