Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/48817 )
Change subject: gma pipe_setup: Add registers for second framebuffer plane ......................................................................
gma pipe_setup: Add registers for second framebuffer plane
Change-Id: I58bcdda79aa67922ca93453571500eddde3853d9 Signed-off-by: Nico Huber nico.huber@secunet.com --- M common/hw-gfx-gma-pipe_setup.adb M common/hw-gfx-gma-pipe_setup.ads 2 files changed, 57 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/17/48817/1
diff --git a/common/hw-gfx-gma-pipe_setup.adb b/common/hw-gfx-gma-pipe_setup.adb index 5ec807d..cefb44f 100644 --- a/common/hw-gfx-gma-pipe_setup.adb +++ b/common/hw-gfx-gma-pipe_setup.adb @@ -734,7 +734,7 @@ if CUR.FBC_CTL /= Registers.Invalid_Register then Registers.Write (CUR.FBC_CTL, 16#0000_0000#); end if; - Registers.Unset_Mask (Controller.SPCNTR, DSPCNTR_ENABLE); + Registers.Unset_Mask (Controller.PLANE_2_CTL, DSPCNTR_ENABLE); if Config.Has_Plane_Control then Clear_Watermarks (Controller); Registers.Unset_Mask (Controller.PLANE_CTL, PLANE_CTL_PLANE_ENABLE); diff --git a/common/hw-gfx-gma-pipe_setup.ads b/common/hw-gfx-gma-pipe_setup.ads index 960e70f..50c9cca 100644 --- a/common/hw-gfx-gma-pipe_setup.ads +++ b/common/hw-gfx-gma-pipe_setup.ads @@ -83,7 +83,6 @@ DSPSTRIDE : Registers.Registers_Index; DSPSURF : Registers.Registers_Index; DSPTILEOFF : Registers.Registers_Index; - SPCNTR : Registers.Registers_Index; -- Skylake registers (partially aliased) PLANE_CTL : Registers.Registers_Index; PLANE_OFFSET : Registers.Registers_Index; @@ -99,6 +98,14 @@ WM_LINETIME : Registers.Registers_Index; PLANE_BUF_CFG : Registers.Registers_Index; PLANE_WM : PLANE_WM_Type; + PLANE_2_CTL : Registers.Registers_Index; + PLANE_2_OFFSET : Registers.Registers_Index; + PLANE_2_POS : Registers.Registers_Index; + PLANE_2_SIZE : Registers.Registers_Index; + PLANE_2_STRIDE : Registers.Registers_Index; + PLANE_2_SURF : Registers.Registers_Index; + PLANE_2_BUF_CFG : Registers.Registers_Index; + PLANE_2_WM : PLANE_WM_Type; CUR_BUF_CFG : Registers.Registers_Index; CUR_WM : PLANE_WM_Type; end record; @@ -118,7 +125,6 @@ DSPSTRIDE => Registers.DSPASTRIDE, DSPSURF => Registers.DSPASURF, DSPTILEOFF => Registers.DSPATILEOFF, - SPCNTR => Registers.SPACNTR, PLANE_CTL => Registers.DSPACNTR, PLANE_OFFSET => Registers.DSPATILEOFF, PLANE_POS => Registers.PLANE_POS_1_A, @@ -141,6 +147,22 @@ Registers.PLANE_WM_1_A_5, Registers.PLANE_WM_1_A_6, Registers.PLANE_WM_1_A_7), + PLANE_2_CTL => Registers.PLANE_CTL_2_A, + PLANE_2_OFFSET => Registers.PLANE_OFFSET_2_A, + PLANE_2_POS => Registers.PLANE_POS_2_A, + PLANE_2_SIZE => Registers.PLANE_SIZE_2_A, + PLANE_2_STRIDE => Registers.PLANE_STRIDE_2_A, + PLANE_2_SURF => Registers.PLANE_SURF_2_A, + PLANE_2_BUF_CFG => Registers.PLANE_BUF_CFG_2_A, + PLANE_2_WM => PLANE_WM_Type'( + Registers.PLANE_WM_2_A_0, + Registers.PLANE_WM_2_A_1, + Registers.PLANE_WM_2_A_2, + Registers.PLANE_WM_2_A_3, + Registers.PLANE_WM_2_A_4, + Registers.PLANE_WM_2_A_5, + Registers.PLANE_WM_2_A_6, + Registers.PLANE_WM_2_A_7), CUR_BUF_CFG => Registers.CUR_BUF_CFG_A, CUR_WM => PLANE_WM_Type'( Registers.CUR_WM_A_0, @@ -163,7 +185,6 @@ DSPSTRIDE => Registers.DSPBSTRIDE, DSPSURF => Registers.DSPBSURF, DSPTILEOFF => Registers.DSPBTILEOFF, - SPCNTR => Registers.SPBCNTR, PLANE_CTL => Registers.DSPBCNTR, PLANE_OFFSET => Registers.DSPBTILEOFF, PLANE_POS => Registers.PLANE_POS_1_B, @@ -186,6 +207,22 @@ Registers.PLANE_WM_1_B_5, Registers.PLANE_WM_1_B_6, Registers.PLANE_WM_1_B_7), + PLANE_2_CTL => Registers.PLANE_CTL_2_B, + PLANE_2_OFFSET => Registers.PLANE_OFFSET_2_B, + PLANE_2_POS => Registers.PLANE_POS_2_B, + PLANE_2_SIZE => Registers.PLANE_SIZE_2_B, + PLANE_2_STRIDE => Registers.PLANE_STRIDE_2_B, + PLANE_2_SURF => Registers.PLANE_SURF_2_B, + PLANE_2_BUF_CFG => Registers.PLANE_BUF_CFG_2_B, + PLANE_2_WM => PLANE_WM_Type'( + Registers.PLANE_WM_2_B_0, + Registers.PLANE_WM_2_B_1, + Registers.PLANE_WM_2_B_2, + Registers.PLANE_WM_2_B_3, + Registers.PLANE_WM_2_B_4, + Registers.PLANE_WM_2_B_5, + Registers.PLANE_WM_2_B_6, + Registers.PLANE_WM_2_B_7), CUR_BUF_CFG => Registers.CUR_BUF_CFG_B, CUR_WM => PLANE_WM_Type'( Registers.CUR_WM_B_0, @@ -208,7 +245,6 @@ DSPSTRIDE => Registers.DSPCSTRIDE, DSPSURF => Registers.DSPCSURF, DSPTILEOFF => Registers.DSPCTILEOFF, - SPCNTR => Registers.SPCCNTR, PLANE_CTL => Registers.DSPCCNTR, PLANE_OFFSET => Registers.DSPCTILEOFF, PLANE_POS => Registers.PLANE_POS_1_C, @@ -231,6 +267,22 @@ Registers.PLANE_WM_1_C_5, Registers.PLANE_WM_1_C_6, Registers.PLANE_WM_1_C_7), + PLANE_2_CTL => Registers.PLANE_CTL_2_C, + PLANE_2_OFFSET => Registers.PLANE_OFFSET_2_C, + PLANE_2_POS => Registers.PLANE_POS_2_C, + PLANE_2_SIZE => Registers.PLANE_SIZE_2_C, + PLANE_2_STRIDE => Registers.PLANE_STRIDE_2_C, + PLANE_2_SURF => Registers.PLANE_SURF_2_C, + PLANE_2_BUF_CFG => Registers.PLANE_BUF_CFG_2_C, + PLANE_2_WM => PLANE_WM_Type'( + Registers.PLANE_WM_2_C_0, + Registers.PLANE_WM_2_C_1, + Registers.PLANE_WM_2_C_2, + Registers.PLANE_WM_2_C_3, + Registers.PLANE_WM_2_C_4, + Registers.PLANE_WM_2_C_5, + Registers.PLANE_WM_2_C_6, + Registers.PLANE_WM_2_C_7), CUR_BUF_CFG => Registers.CUR_BUF_CFG_C, CUR_WM => PLANE_WM_Type'( Registers.CUR_WM_C_0,