[coreboot-gerrit] Change in ...coreboot[master]: arch/riscv: Define and use SBI_ENOSYS

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30175

Change subject: arch/riscv: Define and use SBI_ENOSYS
......................................................................

arch/riscv: Define and use SBI_ENOSYS

Change-Id: Ia7f409ebc7e50383a7e445ef8806953347501dab
Signed-off-by: Jonathan Neuschäfer 
---
M src/arch/riscv/include/sbi.h
M src/arch/riscv/sbi.c
2 files changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/30175/1

diff --git a/src/arch/riscv/include/sbi.h b/src/arch/riscv/include/sbi.h
index e9301f6..2943704 100644
--- a/src/arch/riscv/include/sbi.h
+++ b/src/arch/riscv/include/sbi.h
@@ -26,6 +26,8 @@
 #define SBI_REMOTE_SFENCE_VMA_ASID 7
 #define SBI_SHUTDOWN               8

+#define SBI_ENOSYS 38
+
 #define IPI_SOFT            1
 #define IPI_FENCE_I         2
 #define IPI_SFENCE_VMA      4
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c
index 832d4d3..e540828 100644
--- a/src/arch/riscv/sbi.c
+++ b/src/arch/riscv/sbi.c
@@ -113,7 +113,7 @@
    	ret = send_ipi((uintptr_t *)arg0, IPI_SHUTDOWN);
    	break;
    default:
-		ret = -38;
+		ret = -SBI_ENOSYS;
    	break;
    }
    tf->gpr[10] = ret;