Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46626 )
Change subject: soc/mediatek/mt8183: Fix pq module size config ......................................................................
soc/mediatek/mt8183: Fix pq module size config
For pq module size registers such as DISP_AAL_SIZE, the high bits should be HSIZE, while low bits should be VSIZE. Fix the incorrect settings for these registers where width and height are reversed.
According to MediaTek, there is no practical impact on mt8183 devices, but it's still nice to get this fixed to avoid future confusion.
BUG=b:171167210 TEST=none BRANCH=kukui
Change-Id: I4b6aedf9a3ca133fcbe9cb88b99a13d228233e24 Signed-off-by: Yu-Ping Wu yupingso@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46626 Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8183/ddp.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8183/ddp.c b/src/soc/mediatek/mt8183/ddp.c index eba3f5e..395c821 100644 --- a/src/soc/mediatek/mt8183/ddp.c +++ b/src/soc/mediatek/mt8183/ddp.c @@ -34,7 +34,7 @@ static void enable_pq(struct disp_pq_regs *const regs, u32 width, u32 height, int enable_relay) { - write32(®s->size, height << 16 | width); + write32(®s->size, width << 16 | height); if (enable_relay) write32(®s->cfg, PQ_RELAY_MODE); write32(®s->en, PQ_EN);