Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31278 )
Change subject: mb/google/kahlee: Use GPIO_10 for EC_SYNC_IRQ ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/31278/1/src/ec/google/chromeec/acpi/cros_ec.... File src/ec/google/chromeec/acpi/cros_ec.asl:
https://review.coreboot.org/#/c/31278/1/src/ec/google/chromeec/acpi/cros_ec.... PS1, Line 38: GpioInt
This might be a good time to ask the question: do we know of a (reasonable) way to make this work us […]
I'm not actually quire sure how all the plumbing works, but I think we could skip the GPIO controller and go directly to the APIC if the GPIO generated an SCI. GPIO10 doesn't have SCI support though. I'm not quite sure how the mappings work though. A GPIO maps to a GEVENT number. I'm assuming that Gevent number then maps to an IRQ from the kernel side somehow, but not really sure.