[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42453 )

Change subject: soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42453/4/src/soc/intel/jasperlake/ch... 
File src/soc/intel/jasperlake/chip.h:

https://review.coreboot.org/c/coreboot/+/42453/4/src/soc/intel/jasperlake/ch... 
PS4, Line 293: uint8_t SkipCpuReplacementCheck;
I believe that setting this UPD means MRC training is skipped even if there is no cached training data. If my understanding is correct, what is the impact to the system? Please correct me if I am wrong.

Also is it a requirement for CSE Lite SKU? If so, I am not seeing other SoCs like TGL or CML setting this UPD. I can see CSE Lite SKU is enabled in puff. Why is it different for JSL compared to CML.