[coreboot-gerrit] Change in coreboot[master]: mb/lenovo/x131e: correct USB port config

[Alexander Couzens (Code Review)]

Alexander Couzens has submitted this change. ( https://review.coreboot.org/c/coreboot/+/31365 )

Change subject: mb/lenovo/x131e: correct USB port config
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mb/lenovo/x131e: correct USB port config

Based on schematic and register dumps.

Change-Id: I91fc47022988cfe986fb8c1ed21dc073ee7d16bc
Signed-off-by: James Ye 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31365
Tested-by: build bot (Jenkins) 
Reviewed-by: Alexander Couzens 
Reviewed-by: Paul Menzel 
---
M src/mainboard/lenovo/x131e/romstage.c
1 file changed, 14 insertions(+), 14 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Alexander Couzens: Looks good to me, approved

diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c
index 79a2276..5fc5df6 100644
--- a/src/mainboard/lenovo/x131e/romstage.c
+++ b/src/mainboard/lenovo/x131e/romstage.c
@@ -33,20 +33,20 @@
 }

const struct southbridge_usb_port mainboard_usb_ports[] = {
-	{1, 1, 0},
-	{1, 1, 0},
-	{0, 1, 1},
-	{1, 1, 1},
-	{1, 0, 2},
-	{1, 0, 2},
-	{0, 0, 3},
-	{0, 0, 3},
-	{0, 1, 4},
-	{1, 1, 4},
-	{0, 0, 5},
-	{0, 0, 5},
-	{0, 0, 6},
-	{1, 0, 6},
+	{1, 1, 0},	/* P0: USB 3.0 1 (OC0) */
+	{1, 1, 0},	/* P1: USB 3.0 2 (OC0) */
+	{0, 0, 0},
+	{1, 1, -1},	/* P3: Camera (no OC) */
+	{1, 0, -1},	/* P4: WLAN (no OC) */
+	{1, 0, -1},	/* P5: WWAN (no OC) */
+	{0, 0, 0},
+	{0, 0, 0},
+	{0, 0, 0},
+	{1, 1, 4},	/* P9: USB 2.0 (AUO4) (OC4) */
+	{0, 0, 0},
+	{0, 0, 0},
+	{0, 0, 0},
+	{1, 0, -1},	/* P13: Bluetooth (no OC) */
 };

void mainboard_get_spd(spd_raw_data *spd, bool id_only)