Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46702 )
Change subject: mb/google/auron: Prepare devicetree for PCH split ......................................................................
Patch Set 8:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46702/8/src/mainboard/google/auron/... File src/mainboard/google/auron/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/46702/8/src/mainboard/google/auron/... PS8, Line 29: # Nice!
https://review.coreboot.org/c/coreboot/+/46702/8/src/mainboard/google/auron/... File src/mainboard/google/auron/variants/auron_paine/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/46702/8/src/mainboard/google/auron/... PS8, Line 14: register "sata_port1_gen3_dtle" = "0x5" `chip` entries are only hooked up via device nodes to the tree. A `chip` without a `device` below it does nothing.
That's why there was the empty `domain` device here already. You should add `device pci 1f.2 on end # SATA Controller` here. You could even place the `register` settings inside it.
`sconfig` should bail out if it encounters a chip without device, any takers?