Maxim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84336?usp=email )
Change subject: mb/*/gpio: Remove local macros for bidirectional GPIO ......................................................................
mb/*/gpio: Remove local macros for bidirectional GPIO
These definitions are no longer necessary, since macros from intel/common are used in the configuration [1].
[1] CB:42914
Change-Id: I0a6061aa562ea98c1bcffd86adac9aea28d7766b Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/51nb/x210/gpio.h M src/mainboard/aoostar/wtr_r1/gpio.h M src/mainboard/kontron/mal10/include/carrier/gpio.h M src/mainboard/protectli/vault_adl_p/gpio.c M src/mainboard/protectli/vault_ehl/gpio.h M src/mainboard/razer/blade_stealth_kbl/variants/h2u/include/variant/gpio.h 6 files changed, 0 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/84336/1
diff --git a/src/mainboard/51nb/x210/gpio.h b/src/mainboard/51nb/x210/gpio.h index df12f5b..bb90b05 100644 --- a/src/mainboard/51nb/x210/gpio.h +++ b/src/mainboard/51nb/x210/gpio.h @@ -5,18 +5,6 @@
#include <soc/gpio.h>
-/* - * Bidirectional GPIO port when both RX and TX buffer is enabled - * todo: move this macros to src/soc/intel/common/block/include/intelblocks/gpio_defs.h - */ -#ifndef PAD_CFG_GPIO_BIDIRECT -#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) -#endif - #ifndef __ACPI__
/* Pad configuration in ramstage. */ diff --git a/src/mainboard/aoostar/wtr_r1/gpio.h b/src/mainboard/aoostar/wtr_r1/gpio.h index 067b9ce..5317785 100644 --- a/src/mainboard/aoostar/wtr_r1/gpio.h +++ b/src/mainboard/aoostar/wtr_r1/gpio.h @@ -5,14 +5,6 @@
#include <gpio.h>
-#ifndef PAD_CFG_GPIO_BIDIRECT -#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) -#endif - /* Pad configuration was generated automatically using intelp2m utility */ static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/kontron/mal10/include/carrier/gpio.h b/src/mainboard/kontron/mal10/include/carrier/gpio.h index 9466b24..b771d82 100644 --- a/src/mainboard/kontron/mal10/include/carrier/gpio.h +++ b/src/mainboard/kontron/mal10/include/carrier/gpio.h @@ -5,27 +5,6 @@
#include <gpio.h>
-/* - * Bidirectional GPIO port when both RX and TX buffer is enabled - * TODO: move this macros to src/soc/intel/common/block/include/intelblocks/gpio_defs.h - */ -#ifndef PAD_CFG_GPIO_BIDIRECT_IOS -#define PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own) | \ - PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm)) -#endif - -#ifndef PAD_CFG_GPIO_BIDIRECT -#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) -#endif - void carrier_gpio_configure(void);
#endif /* CARRIER_GPIO_H */ diff --git a/src/mainboard/protectli/vault_adl_p/gpio.c b/src/mainboard/protectli/vault_adl_p/gpio.c index 1e65f03..212d439 100644 --- a/src/mainboard/protectli/vault_adl_p/gpio.c +++ b/src/mainboard/protectli/vault_adl_p/gpio.c @@ -4,14 +4,6 @@
#include "gpio.h"
-#ifndef PAD_CFG_GPIO_BIDIRECT -#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) -#endif - /* Pad configuration was generated automatically using intelp2m utility */ static const struct pad_config gpio_table[] = {
diff --git a/src/mainboard/protectli/vault_ehl/gpio.h b/src/mainboard/protectli/vault_ehl/gpio.h index 2f1c2ec..7eac656 100644 --- a/src/mainboard/protectli/vault_ehl/gpio.h +++ b/src/mainboard/protectli/vault_ehl/gpio.h @@ -5,14 +5,6 @@
#include <gpio.h>
-#ifndef PAD_CFG_GPIO_BIDIRECT -#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) -#endif - /* PAD configuration was generated automatically using intelp2m utility */ static const struct pad_config gpio_table[] = { /* ------- GPIO Community 0 ------- */ diff --git a/src/mainboard/razer/blade_stealth_kbl/variants/h2u/include/variant/gpio.h b/src/mainboard/razer/blade_stealth_kbl/variants/h2u/include/variant/gpio.h index 4f98432..654dbdd 100644 --- a/src/mainboard/razer/blade_stealth_kbl/variants/h2u/include/variant/gpio.h +++ b/src/mainboard/razer/blade_stealth_kbl/variants/h2u/include/variant/gpio.h @@ -5,18 +5,6 @@
#include <soc/gpio.h>
-/* - * Bidirectional GPIO port when both RX and TX buffer is enabled - * todo: move this macros to src/soc/intel/common/block/include/intelblocks/gpio_defs.h - */ -#ifndef PAD_CFG_GPIO_BIDIRECT -#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ - _PAD_CFG_STRUCT(pad, \ - PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ - PAD_BUF(NO_DISABLE) | val, \ - PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) -#endif - #ifndef __ACPI__
/* Pad configuration in ramstage. */